Re: [Xen-devel] [PATCH 3/7] x86/pagewalk: Helpers for reserved bit handling

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 02/03/17 14:12, Tim Deegan wrote:
> At 14:03 +0000 on 27 Feb (1488204194), Andrew Cooper wrote:
>> +static inline bool guest_has_pse36(const struct vcpu *v)
>> +{
>> +     /* No support for 2-level PV guests. */
>> +    return is_pv_vcpu(v) ? 0 : paging_mode_hap(v->domain);
>> +}
> Should this check the CPUID policy to see whether PSE36 is supported?
> There's no way to disable it in a HAP guest anyway, so maybe not, for
> consistency?

Hmm - perhaps I need to rethink this slightly.

CR4.PSE controls this part of the pagewalk, which we can control with
CPUID checks.  However, if CR4.PSE it set, we cannot hide hardware’s
preference of PSE36 from the guest, and in reality it will always be
present.

~Andrew

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