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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2 04/10] x86/cpuid: Handle leaf 0x4 in guest_cpuid()
Leaf 0x4 is reserved by AMD. For Intel, it is a multi-invocation leaf with
ecx enumerating different cache details.
Add a new union for it in struct cpuid_policy, collect it from hardware in
calculate_raw_policy(), audit it in recalculate_cpuid_policy() and update
guest_cpuid() and update_domain_cpuid_info() to properly insert/extract data.
A lot of the data here will need further auditing/refinement when better
topology support is introduced, but for now, this matches the existing
toolstack behaviour.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
v2:
* The cache type field is 5 bits wide, rather than 4.
* Don't bother clobbering p->basic.raw[0x{4,7,d}]
---
xen/arch/x86/cpuid.c | 48 +++++++++++++++++++++++++++++++++++++++++++--
xen/arch/x86/domctl.c | 8 +++++++-
xen/include/asm-x86/cpuid.h | 10 ++++++++++
3 files changed, 63 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index d6f6b88..e85415f 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -199,6 +199,7 @@ static void recalculate_misc(struct cpuid_policy *p)
case X86_VENDOR_AMD:
zero_leaves(p->basic.raw, 0x2, 0x3);
+ memset(p->cache.raw, 0, sizeof(p->cache.raw));
p->basic.raw[0x9] = EMPTY_LEAF;
p->extd.vendor_ebx = p->basic.vendor_ebx;
@@ -242,6 +243,25 @@ static void __init calculate_raw_policy(void)
cpuid_leaf(i, &p->basic.raw[i]);
}
+ if ( p->basic.max_leaf >= 4 )
+ {
+ for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i )
+ {
+ cpuid_count_leaf(4, i, &p->cache.raw[i]);
+
+ if ( p->cache.subleaf[i].type == 0 )
+ break;
+ }
+
+ /*
+ * The choice of CPUID_GUEST_NR_CACHE is arbitrary. It is expected
+ * that it will eventually need increasing for future hardware.
+ */
+ if ( i == ARRAY_SIZE(p->cache.raw) )
+ printk(XENLOG_WARNING
+ "CPUID: Insufficient Leaf 4 space for this hardware\n");
+ }
+
if ( p->basic.max_leaf >= 7 )
{
cpuid_count_leaf(7, 0, &p->feat.raw[0]);
@@ -520,6 +540,23 @@ void recalculate_cpuid_policy(struct domain *d)
recalculate_xstate(p);
recalculate_misc(p);
+ for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i )
+ {
+ if ( p->cache.subleaf[i].type >= 1 &&
+ p->cache.subleaf[i].type <= 3 )
+ {
+ /* Subleaf has a valid cache type. Zero reserved fields. */
+ p->cache.raw[i].a &= 0xffffc3ffu;
+ p->cache.raw[i].d &= 0x00000007u;
+ }
+ else
+ {
+ /* Subleaf is not valid. Zero the rest of the union. */
+ zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1);
+ break;
+ }
+ }
+
if ( !p->extd.svm )
p->extd.raw[0xa] = EMPTY_LEAF;
@@ -605,7 +642,7 @@ static void pv_cpuid(uint32_t leaf, uint32_t subleaf,
struct cpuid_leaf *res)
*res = EMPTY_LEAF;
break;
- case 0x0 ... 0x3:
+ case 0x0 ... 0x4:
case 0x7 ... 0x9:
case 0xc ... XSTATE_CPUID:
case 0x80000000 ... 0xffffffff:
@@ -640,7 +677,7 @@ static void hvm_cpuid(uint32_t leaf, uint32_t subleaf,
struct cpuid_leaf *res)
res->a = (res->a & ~0xff) | 3;
break;
- case 0x0 ... 0x3:
+ case 0x0 ... 0x4:
case 0x7 ... 0x9:
case 0xc ... XSTATE_CPUID:
case 0x80000000 ... 0xffffffff:
@@ -674,6 +711,13 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
switch ( leaf )
{
+ case 0x4:
+ if ( subleaf >= ARRAY_SIZE(p->cache.raw) )
+ return;
+
+ *res = p->cache.raw[subleaf];
+ break;
+
case 0x7:
ASSERT(p->feat.max_subleaf < ARRAY_SIZE(p->feat.raw));
if ( subleaf > min_t(uint32_t, p->feat.max_subleaf,
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 02b48e8..d87efa2 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -101,6 +101,10 @@ static int update_domain_cpuid_info(struct domain *d,
switch ( ctl->input[0] )
{
case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1:
+ if ( ctl->input[0] == 4 &&
+ ctl->input[1] >= ARRAY_SIZE(p->cache.raw) )
+ return 0;
+
if ( ctl->input[0] == 7 &&
ctl->input[1] >= ARRAY_SIZE(p->feat.raw) )
return 0;
@@ -129,7 +133,9 @@ static int update_domain_cpuid_info(struct domain *d,
switch ( ctl->input[0] )
{
case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1:
- if ( ctl->input[0] == 7 )
+ if ( ctl->input[0] == 4 )
+ p->cache.raw[ctl->input[1]] = leaf;
+ else if ( ctl->input[0] == 7 )
p->feat.raw[ctl->input[1]] = leaf;
else if ( ctl->input[0] == XSTATE_CPUID )
p->xstate.raw[ctl->input[1]] = leaf;
diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h
index aa482b7..d13b322 100644
--- a/xen/include/asm-x86/cpuid.h
+++ b/xen/include/asm-x86/cpuid.h
@@ -63,6 +63,7 @@ DECLARE_PER_CPU(bool, cpuid_faulting_enabled);
#define CPUID_GUEST_NR_BASIC (0xdu + 1)
#define CPUID_GUEST_NR_FEAT (0u + 1)
+#define CPUID_GUEST_NR_CACHE (5u + 1)
#define CPUID_GUEST_NR_XSTATE (62u + 1)
#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1)
#define CPUID_GUEST_NR_EXTD_AMD (0x1cu + 1)
@@ -137,6 +138,15 @@ struct cpuid_policy
};
} basic;
+ /* Structured cache leaf: 0x00000004[xx] */
+ union {
+ struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE];
+ struct {
+ uint32_t type:5,
+ :27, :32, :32, :32;
+ } subleaf[CPUID_GUEST_NR_CACHE];
+ } cache;
+
/* Structured feature leaf: 0x00000007[xx] */
union {
struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT];
--
2.1.4
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