Re: [Xen-devel] [PATCH v2 5/9] x86/pagewalk: Helpers for reserved bit handling

[Tim Deegan <tim@xxxxxxx>]

At 16:31 +0000 on 16 Mar (1489681899), Andrew Cooper wrote:
> Some bits are unconditionally reserved in pagetable entries, or reserved
> because of alignment restrictions.  Other bits are reserved because of control
> register configuration.
> 
> Introduce helpers which take an individual vcpu and guest pagetable entry, and
> calculates whether any reserved bits are set.
> 
> While here, add a couple of newlines to aid readability.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

Reviewed-by: Tim Deegan <tim@xxxxxxx>, although:

> +/* Mask covering the reserved bits from superpage alignment. */
> +#define SUPERPAGE_RSVD(bit)                                             \
> +    (((1ULL << (bit)) - 1) & ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1)))

I think this will be wrong if we ever get l4 superpages, as the mask
is only 32 bits wide.

Cheers,

Tim.

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