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[Xen-devel] [PATCH v2 4/7] x86/vioapic: allow the vIO APIC to have a variable number of pins



Although it's still always set to VIOAPIC_NUM_PINS (48).

Add a new field to the hvm_ioapic struct to contain the number of pins (number
of IO redirection table entries) and turn the redirection table into a variable
sized array.

Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
---
Cc: Jan Beulich <jbeulich@xxxxxxxx>
Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
Changes since v1:
 - Almost completely reworked due to previous changes.
---
 xen/arch/x86/hvm/vioapic.c        | 28 +++++++++++++++++-----------
 xen/include/asm-x86/hvm/vioapic.h |  4 +++-
 2 files changed, 20 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c
index 39dbf832b3..00048ad65d 100644
--- a/xen/arch/x86/hvm/vioapic.c
+++ b/xen/arch/x86/hvm/vioapic.c
@@ -53,7 +53,7 @@ static uint32_t vioapic_read_indirect(const struct 
hvm_vioapic *vioapic)
     case VIOAPIC_REG_VERSION:
         result = ((union IO_APIC_reg_01){
                   .bits = { .version = VIOAPIC_VERSION_ID,
-                            .entries = VIOAPIC_NUM_PINS - 1 }
+                            .entries = vioapic->nr_pins - 1 }
                   }).raw;
         break;
 
@@ -73,7 +73,7 @@ static uint32_t vioapic_read_indirect(const struct 
hvm_vioapic *vioapic)
         uint32_t redir_index = (vioapic->ioregsel - VIOAPIC_REG_RTE0) >> 1;
         uint64_t redir_content;
 
-        if ( redir_index >= VIOAPIC_NUM_PINS )
+        if ( redir_index >= vioapic->nr_pins )
         {
             gdprintk(XENLOG_WARNING, "apic_mem_readl:undefined ioregsel %x\n",
                      vioapic->ioregsel);
@@ -197,7 +197,7 @@ static void vioapic_write_indirect(
         HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "rte[%02x].%s = %08x",
                     redir_index, vioapic->ioregsel & 1 ? "hi" : "lo", val);
 
-        if ( redir_index >= VIOAPIC_NUM_PINS )
+        if ( redir_index >= vioapic->nr_pins )
         {
             gdprintk(XENLOG_WARNING, "vioapic_write_indirect "
                      "error register %x\n", vioapic->ioregsel);
@@ -368,7 +368,7 @@ void vioapic_irq_positive_edge(struct domain *d, unsigned 
int irq)
 
     HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "irq %x", irq);
 
-    ASSERT(irq < VIOAPIC_NUM_PINS);
+    ASSERT(irq < vioapic->nr_pins);
     ASSERT(spin_is_locked(&d->arch.hvm_domain.irq_lock));
 
     ent = &vioapic->redirtbl[irq];
@@ -397,7 +397,7 @@ void vioapic_update_EOI(struct domain *d, u8 vector)
 
     spin_lock(&d->arch.hvm_domain.irq_lock);
 
-    for ( gsi = 0; gsi < VIOAPIC_NUM_PINS; gsi++ )
+    for ( gsi = 0; gsi < vioapic->nr_pins; gsi++ )
     {
         ent = &vioapic->redirtbl[gsi];
         if ( ent->fields.vector != vector )
@@ -431,9 +431,8 @@ static int ioapic_save(struct domain *d, 
hvm_domain_context_t *h)
     if ( !has_vioapic(d) )
         return 0;
 
-    BUILD_BUG_ON(sizeof(struct hvm_hw_vioapic) !=
-                 sizeof(struct hvm_vioapic) -
-                 offsetof(struct hvm_vioapic, base_address));
+    if ( s->nr_pins != VIOAPIC_NUM_PINS )
+        return -EOPNOTSUPP;
 
     return hvm_save_entry(IOAPIC, 0, h, &s->base_address);
 }
@@ -445,6 +444,9 @@ static int ioapic_load(struct domain *d, 
hvm_domain_context_t *h)
     if ( !has_vioapic(d) )
         return -ENODEV;
 
+    if ( s->nr_pins != VIOAPIC_NUM_PINS )
+        return -EOPNOTSUPP;
+
     return hvm_load_entry(IOAPIC, h, &s->base_address);
 }
 
@@ -453,14 +455,16 @@ HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, 
ioapic_load, 1, HVMSR_PER_DOM);
 void vioapic_reset(struct domain *d)
 {
     struct hvm_vioapic *vioapic = domain_vioapic(d);
+    uint32_t nr_pins = vioapic->nr_pins;
     int i;
 
     if ( !has_vioapic(d) )
         return;
 
-    memset(vioapic, 0, sizeof(*vioapic));
+    memset(vioapic, 0, hvm_vioapic_size(nr_pins));
     vioapic->domain = d;
-    for ( i = 0; i < VIOAPIC_NUM_PINS; i++ )
+    vioapic->nr_pins = nr_pins;
+    for ( i = 0; i < nr_pins; i++ )
         vioapic->redirtbl[i].fields.mask = 1;
     vioapic->base_address = VIOAPIC_DEFAULT_BASE_ADDRESS;
 }
@@ -471,10 +475,12 @@ int vioapic_init(struct domain *d)
         return 0;
 
     if ( (d->arch.hvm_domain.vioapic == NULL) &&
-         ((d->arch.hvm_domain.vioapic = xmalloc(struct hvm_vioapic)) == NULL) )
+         ((d->arch.hvm_domain.vioapic =
+           xmalloc_bytes(hvm_vioapic_size(VIOAPIC_NUM_PINS))) == NULL) )
         return -ENOMEM;
 
     d->arch.hvm_domain.vioapic->domain = d;
+    d->arch.hvm_domain.vioapic->nr_pins = VIOAPIC_NUM_PINS;
     vioapic_reset(d);
 
     register_mmio_handler(d, &vioapic_mmio_ops);
diff --git a/xen/include/asm-x86/hvm/vioapic.h 
b/xen/include/asm-x86/hvm/vioapic.h
index e8ec0be7b6..df8154390f 100644
--- a/xen/include/asm-x86/hvm/vioapic.h
+++ b/xen/include/asm-x86/hvm/vioapic.h
@@ -49,13 +49,15 @@
 
 struct hvm_vioapic {
     struct domain *domain;
+    uint32_t nr_pins;
     /* Layout below must match hvm_hw_vioapic. */
     uint64_t base_address;
     uint32_t ioregsel;
     uint32_t id;
-    union vioapic_redir_entry redirtbl[VIOAPIC_NUM_PINS];
+    union vioapic_redir_entry redirtbl[];
 };
 
+#define hvm_vioapic_size(cnt) offsetof(struct hvm_vioapic, redirtbl[cnt])
 #define domain_vioapic(d) ((d)->arch.hvm_domain.vioapic)
 #define vioapic_domain(v) ((v)->domain)
 
-- 
2.12.1


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