[Xen-devel] [PATCH 11/15] tools: tracing: handle RCU events in xentrace and xenalyze

[Dario Faggioli <dario.faggioli@xxxxxxxxxx>]

Signed-off-by: Dario Faggioli <dario.faggioli@xxxxxxxxxx>
---
Cc: George Dunlap <george.dunlap@xxxxxxxxxxxxx>
Cc: Ian Jackson <ian.jackson@xxxxxxxxxxxxx>
Cc: Wei Liu <wei.liu2@xxxxxxxxxx>
---
 tools/xentrace/formats    |    5 +++
 tools/xentrace/xenalyze.c |   82 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 87 insertions(+)

diff --git a/tools/xentrace/formats b/tools/xentrace/formats
index 77dbd93..615ba7d 100644
--- a/tools/xentrace/formats
+++ b/tools/xentrace/formats
@@ -214,6 +214,11 @@
 0x01001007  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  rcu_do_callbacks [ ]
 0x01001008  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  rcu_pending [ %(1)d ]
 
+0x01002001  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  softirq_handler [ 
nr:pending_mask = 0x%(1)08x ]
+0x01002002  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  softirq_raise_cpumask [ nr = 
%(1)d, CPU mask: 0x%(7)08x%(6)08x%(5)08x%(4)08x%(3)08x%(2)08x ]
+0x01002003  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  softirq_raise_cpu [ nr:cpu = 
0x%(1)08x ]
+0x01002004  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  softirq_raise [ nr = %(1)d ]
+
 0x00084001  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  hpet create [ tn = %(1)d, irq 
= %(2)d, delta = 0x%(4)08x%(3)08x, period = 0x%(6)08x%(5)08x ]
 0x00084002  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  pit create [ delta = 
0x%(1)016x, period = 0x%(2)016x ]
 0x00084003  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  rtc create [ delta = 
0x%(1)016x , period = 0x%(2)016x ]
diff --git a/tools/xentrace/xenalyze.c b/tools/xentrace/xenalyze.c
index e98596a..5cb0f3b 100644
--- a/tools/xentrace/xenalyze.c
+++ b/tools/xentrace/xenalyze.c
@@ -8684,6 +8684,84 @@ void rcu_process(struct pcpu_info *p) {
     }
 }
 
+void softirq_process(struct pcpu_info *p) {
+    struct record_info *ri = &p->ri;
+
+    switch ( ri->event )
+    {
+    case TRC_XEN_SIRQ_RAISE:
+    {
+        struct {
+            uint32_t nr;
+        } *r = (typeof(r))ri->d;
+
+        if ( opt.dump_all )
+        {
+            printf(" %s raise_softirq nr %u\n",
+                   ri->dump_header,
+                   r->nr);
+        }
+        break;
+    }
+    case TRC_XEN_SIRQ_RAISE_CPU:
+    {
+        struct {
+            uint16_t cpu, nr;
+        } *r = (typeof(r))ri->d;
+
+        if ( opt.dump_all )
+        {
+            printf(" %s raise_softirq nr %u on cpu %u\n",
+                   ri->dump_header,
+                   r->nr,
+                   r->cpu);
+        }
+        break;
+    }
+    case TRC_XEN_SIRQ_RAISE_MASK:
+    {
+        struct {
+            uint32_t nr;
+            uint32_t mask[6];
+        } *r = (typeof(r))ri->d;
+
+        if ( opt.dump_all )
+        {
+            int i;
+
+            i = 5;
+            while ( i >= 0 && !r->mask[i] ) i--;
+            printf(" %s raise_softirq nr %u on cpumask 0x",
+                   ri->dump_header,
+                   r->nr);
+            for ( ; i >= 0 ; i-- )
+                printf("%08x", r->mask[i]);
+            printf("\n");
+        }
+        break;
+    }
+    case TRC_XEN_SIRQ_HANDLER:
+    {
+        struct {
+            uint16_t pending, nr;
+        } *r = (typeof(r))ri->d;
+
+        if ( opt.dump_all )
+        {
+            printf(" %s softirq_handler nr %u, pending = 0x%08x\n",
+                   ri->dump_header,
+                   r->nr,
+                   r->pending);
+        }
+        break;
+    }
+    default:
+        if( opt.dump_all )
+            dump_generic(stdout, ri);
+        break;
+    }
+}
+
 #define TRC_HW_SUB_PM 1
 #define TRC_HW_SUB_IRQ 2
 void hw_process(struct pcpu_info *p)
@@ -8703,6 +8781,7 @@ void hw_process(struct pcpu_info *p)
 }
 
 #define TRC_XEN_SUB_RCU 1
+#define TRC_XEN_SUB_SIRQ 2
 void xen_process(struct pcpu_info *p)
 {
     struct record_info *ri = &p->ri;
@@ -8712,6 +8791,9 @@ void xen_process(struct pcpu_info *p)
     case TRC_XEN_SUB_RCU:
         rcu_process(p);
         break;
+    case TRC_XEN_SUB_SIRQ:
+        softirq_process(p);
+        break;
     }
 }
 


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