Re: [Xen-devel] [PATCH v11 13/23] x86: refactor psr: CDP: implement CPU init flow.

[Yi Sun <yi.y.sun@xxxxxxxxxxxxxxx>]

On 17-05-31 03:37:48, Jan Beulich wrote:
> >>> On 03.05.17 at 10:44, <yi.y.sun@xxxxxxxxxxxxxxx> wrote:
> > @@ -150,11 +151,28 @@ static DEFINE_PER_CPU(struct psr_assoc, psr_assoc);
> > @@ -249,6 +267,25 @@ static void cat_init_feature(const struct cpuid_leaf 
> > *regs,
> >  
> >          break;
> >  
> > +    case PSR_SOCKET_L3_CDP:
> > +    {
> > +        unsigned long val;
> 
> As MSR values are specifically 64-bit ones, I think uint64_t would
> be more appropriate here. Depending on intended later additions to
> this function it may also be worthwhile making this a switch-wide
> variable.
> 
This variable is only used in this case. Will change it to uint64_t.

> > +        /* Cut half of cos_max when CDP is enabled. */
> > +        feat->cos_max >>= 1;
> > +
> > +        /* We only write mask1 since mask0 is always all ones by default. 
> > */
> 
> Is this, btw, just reset state or even guaranteed after offlining
> and re-onlining a CPU?
> 
Below MSRs are all per socket. So, we just need reset them when socket is
online.

> > +        wrmsrl(MSR_IA32_PSR_L3_MASK(1), cat_default_val(feat->cbm_len));
> > +        rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val);
> > +        wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, val | (1 << 
> > PSR_L3_QOS_CDP_ENABLE_BIT));
> 
> 1u at the very least, perhaps even 1ull.
> 
Thanks!

> Jan

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