[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH v5 07/12] arm/mem_access: Introduce BIT_ULL bit operation



Hi Sergej,

On 06/27/2017 12:52 PM, Sergej Proskurin wrote:
We introduce the BIT_ULL macro to using values of unsigned long long as
to enable setting bits of 64-bit registers on AArch32.  In addition,
this commit adds a define holding the register width of 64 bit
double-word registers. This define simplifies using the associated
constants in the following commits.

Signed-off-by: Sergej Proskurin <proskurin@xxxxxxxxxxxxx>

Reviewed-by: Julien Grall <julien.grall@xxxxxxx>

Cheers,

---
Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>
Cc: Julien Grall <julien.grall@xxxxxxx>
---
v4: We reused the previous commit with the msg "arm/mem_access: Add
     defines holding the width of 32/64bit regs" from v3, as we can reuse
     the already existing define BITS_PER_WORD.

v5: Introduce a new macro BIT_ULL instead of changing the type of the
     macro BIT.

     Remove the define BITS_PER_DOUBLE_WORD.
---
  xen/include/asm-arm/bitops.h | 1 +
  1 file changed, 1 insertion(+)

diff --git a/xen/include/asm-arm/bitops.h b/xen/include/asm-arm/bitops.h
index bda889841b..1cbfb9edb2 100644
--- a/xen/include/asm-arm/bitops.h
+++ b/xen/include/asm-arm/bitops.h
@@ -24,6 +24,7 @@
  #define BIT(nr)                 (1UL << (nr))
  #define BIT_MASK(nr)            (1UL << ((nr) % BITS_PER_WORD))
  #define BIT_WORD(nr)            ((nr) / BITS_PER_WORD)
+#define BIT_ULL(nr)             (1ULL << (nr))
  #define BITS_PER_BYTE           8
#define ADDR (*(volatile int *) addr)


--
Julien Grall

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
https://lists.xen.org/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.