[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2] aarch64: advertise the GIC system register interface
On 6 November 2017 at 22:16, Stefano Stabellini <sstabellini@xxxxxxxxxx> wrote: > When QEMU emulates a GICv3, it needs to advertise the presence of the > system register interface, which is done via id_aa64pfr0. > > To do that, and at the same time to avoid advertising the presence of > the system register interface when it is actually not available, set a > boolean property in machvirt_init. Check on the boolean property from > register_cp_regs_for_features and set id_aa64pfr0 accordingly. > > Signed-off-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index 9e18b41..369d36b 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -1401,6 +1401,9 @@ static void machvirt_init(MachineState *machine) > object_property_set_link(cpuobj, OBJECT(secure_sysmem), > "secure-memory", &error_abort); > } > + if (vms->gic_version == 3) { > + object_property_set_bool(cpuobj, true, "gicv3-sysregs", NULL); > + } > > object_property_set_bool(cpuobj, true, "realized", NULL); > object_unref(cpuobj); I thought about this on the cycle into work this morning, and I think that rather than require every board that uses gicv3 to set a property on the CPU, we should change the definition of the id_aa64pfr0 register so that rather than being ARM_CP_CONST it has a readfn, and then at runtime we can get that readfn to add in the right bit if env->gicv3state is non-null. I'll put together a patch this afternoon. thanks -- PMM _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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