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[Xen-devel] Problem getting console on TI Jacinto 6



Hi all,

We have been working on getting Xen hypervisor up on TI DRA7xx J6 platform.
We are using 4.4 kernel version (It is supported by TI's Processor SDK).

We are able to get upto kernel boot but having issues getting serial console shell login. We are able to switch between dom0 and xen console. Also able to dump logs through 'w', 'e', 't', 'h' etc.. from xen console. We have cross compiled xen tools, enabled systemd support and copied the binaries and serives to their respective location in the rootfs.
 Problem is with getting login shell.
We are using USB to serial cable which comes along with J6 evm board.
We have enabled CONFIG_LL_DEBUG and CONFIG_EARLY_PRINTK

Following is the boot logs :

U-Boot 2014.07-00035-gdcde330-dirty (Nov 17 2017 - 23:38:38)

CPU  : DRA752 ES1.0
Board: DRA7xx
I2C:   ready
DRAM:  1.5 GiB
WARNING: Caches not enabled
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment

SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst 
scanning bus for devices...
Found 0 device(s).
SCSI:  Net:   <ethaddr> not set. Validating first E-fuse MAC
cpsw
Hit any key to stop autoboot:  0 

U-Boot# fatload mmc 0:1 0x80000000 xen-uImage
reading xen-uImage
852040 bytes read in 44 ms (18.5 MiB/s)
U-Boot# fatload mmc 0:1 0xc0000000 zImage
reading zImage
3620632 bytes read in 173 ms (20 MiB/s)
U-Boot# fatload mmc 0:1 0xc2f00000 dra7-evm.dtb
reading dra7-evm.dtb
97816 bytes read in 9 ms (10.4 MiB/s)
U-Boot# bootm 0x80000000 - 0xc2f00000
## Booting kernel from Legacy Image at 80000000 ...
   Image Name:   XEN
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    851976 Bytes = 832 KiB
   Load Address: 80000000
   Entry Point:  80000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at c2f00000
   Booting using the fdt blob at 0xc2f00000
   Loading Kernel Image ... OK
   Using Device Tree in place at c2f00000, end c2f1ae17

Starting kernel ...

- UART enabled -
- CPU 00000000 booting -
- Xen starting in Hyp mode -
- Zero BSS -
- Setting up control registers -
- Turning on paging -
- Ready -
(XEN) Checking for initrd in /chosen
(XEN) RAM: 0000000080000000 - 00000000dfffffff
(XEN) 
(XEN) MODULE[0]: 00000000c2f00000 - 00000000c2f18000 Device Tree  
(XEN) MODULE[1]: 00000000c0000000 - 00000000c2000000 Kernel       
(XEN) MODULE[2]: 00000000c3000000 - 00000000c3010000 XSM          
(XEN)  RESVD[0]: 00000000c2f00000 - 00000000c2f18000
(XEN) 
(XEN) Command line: dom0_mem=512M dom0_rambase_pfn=0x80000 console=dtuart dtuart=serial0 dom0_max_vcpus=2 bootscrub=0 flask_enforcing=1
(XEN) parameter "dom0_rambase_pfn" unknown!
(XEN) parameter "flask_enforcing" unknown!
(XEN) Placing Xen at 0x00000000dfe00000-0x00000000e0000000
(XEN) Update BOOTMOD_XEN from 0000000080000000-0000000080115781 => 00000000dfe00000-00000000dff15781
(XEN) Xen heap: 00000000da000000-00000000de000000 (16384 pages)
(XEN) Dom heap: 376832 pages
(XEN) Domain heap initialised
(XEN) Booting using Device Tree
(XEN) Platform: TI DRA7
(XEN) Looking for dtuart at "serial0", options ""
 Xen 4.10.0-rc
(XEN) Xen version 4.10.0-rc (prabhuraj@) (arm-linux-gnueabihf-gcc (Ubuntu/Linaro 4.8.4-2ubuntu1~14.04.1) 4.8.4) debug=y  Mon Nov 13 18:23:18 I7
(XEN) Latest ChangeSet: Mon Nov 6 11:35:23 2017 +0100 git:92f0d43
(XEN) Processor: 412fc0f2: "ARM Limited", variant: 0x2, part 0xc0f, rev 0x2
(XEN) 32-bit Execution:
(XEN)   Processor Features: 00001131:00011011
(XEN)     Instruction Sets: AArch32 A32 Thumb Thumb-2 ThumbEE Jazelle
(XEN)     Extensions: GenericTimer Security
(XEN)   Debug Features: 02010555
(XEN)   Auxiliary Features: 00000000
(XEN)   Memory Model Features: 10201105 20000000 01240000 02102211
(XEN)  ISA Features: 02101110 13112111 21232041 11112131 10011142 00000000
(XEN) /psci method must be smc, but is: "hvc"
(XEN) Set AuxCoreBoot1 to 00000000dfe0004c (0020004c)
(XEN) Set AuxCoreBoot0 to 0x20
(XEN) SMP: Allowing 2 CPUs
(XEN) Generic Timer IRQ: phys=30 hyp=26 virt=27 Freq: 6144 KHz
(XEN) GICv2: WARNING: The GICC size is too small: 0x1000 expected 0x2000
(XEN) GICv2 initialization:
(XEN)         gic_dist_addr=0000000048211000
(XEN)         gic_cpu_addr=0000000048212000
(XEN)         gic_hyp_addr=0000000048214000
(XEN)         gic_vcpu_addr=0000000048216000
(XEN)         gic_maintenance_irq=25
(XEN) GICv2: 192 lines, 2 cpus, secure (IID 0000043b).
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Allocated console ring of 16 KiB.
(XEN) VFP implementer 0x41 architecture 4 part 0x30 variant 0xf rev 0x0
(XEN) Bringing up CPU1
- CPU 00000001 booting -
- Xen starting in Hyp mode -
- Setting up control registers -
- Turning on paging -
- Ready -
(XEN) CPU 1 booted.
(XEN) Brought up 2 CPUs
(XEN) P2M: 40-bit IPA
(XEN) P2M: 3 levels with order-1 root, VTCR 0x80003558
(XEN) I/O virtualisation disabled
(XEN) build-id: e115fd5c4c7e13be00969c6569ff9325d9b5fd81
(XEN) alternatives: Patching with alt table 100b9540 -> 100b9570
(XEN) grant_table.c:1688:IDLEv0 Expanding d0 grant table from 0 to 1 frames
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Loading kernel from boot module @ 00000000c0000000
(XEN) Allocating 1:1 mappings totalling 512MB for dom0:
(XEN) BANK[0] 0x000000a0000000-0x000000c0000000 (512MB)
(XEN) Grant table range: 0x000000dfe00000-0x000000dfe40000
(XEN) Loading zImage from 00000000c0000000 to 00000000a7c00000-00000000a7f73f18
(XEN) Allocating PPI 16 for event channel interrupt
(XEN) Loading dom0 DTB to 0x00000000a8000000-0x00000000a8017a4e
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: All
(XEN) Guest Loglevel: All
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 288kB init memory.
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Initializing cgroup subsys cpuset
[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Initializing cgroup subsys cpuacct
[    0.000000] Linux version 4.4.84-g7e6588b179 (prabhuraj@prabhuraj-E40) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #7 SMP PREEMP7
[    0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] Machine model: TI DRA742
[    0.000000] bootconsole [earlycon0] enabled
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB
[    0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB
[    0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB
[    0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB
[    0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool
[    0.000000] cma: Reserved 24 MiB at 0x00000000be400000
[    0.000000] Forcing write-allocate cache policy for SMP
[    0.000000] Memory policy: Data cache writealloc
(XEN) *** Serial input -> Xen (type 'CTRL-a' three times to switch input to DOM0)
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)



Please provide your valuable support.

Thanks,
Prabhuraj
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