[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2] x86/hvm: fix interaction between internal and external emulation
> -----Original Message----- > From: Jan Beulich [mailto:JBeulich@xxxxxxxx] > Sent: 05 December 2017 14:32 > To: Paul Durrant <Paul.Durrant@xxxxxxxxxx> > Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx > Subject: RE: [PATCH v2] x86/hvm: fix interaction between internal and > external emulation > > >>> On 05.12.17 at 15:00, <Paul.Durrant@xxxxxxxxxx> wrote: > >> From: Jan Beulich [mailto:JBeulich@xxxxxxxx] > >> Sent: 05 December 2017 13:53 > >> >>> On 28.11.17 at 15:05, <paul.durrant@xxxxxxxxxx> wrote: > >> rc = x86_emulate(&hvmemul_ctxt->ctxt, ops); > >> > >> if ( rc != X86EMUL_RETRY ) > >> { > >> vio->mmio_cache_count = 0; > >> vio->mmio_insn_bytes = 0; > >> } > >> else > >> { > >> ... > >> } > >> if ( rc == X86EMUL_OKAY && vio->mmio_retry ) > >> rc = X86EMUL_RETRY; > >> > > > > But that's not safe is it? If we've only completed some of the reps of an > > instruction then we can't flush the instruction cache and we can't allow the > > guest to take interrupts, can we? > > Of course we can, just like a repeated string insn may be > interrupted on bare hardware between any two iterations (with > RIP still pointing at that insn). In fact with EFLAGS.TF set it is a > requirement to deliver #DB after every iteration. Ok. In that case your re-ordering would seem sound. Paul > > Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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