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Re: [Xen-devel] [RFC] xen/arm: Handling cache maintenance instructions by set/way

On 07/12/17 15:45, Jan Beulich wrote:
>>>> On 07.12.17 at 15:53, <marc.zyngier@xxxxxxx> wrote:
>> On 07/12/17 13:52, Julien Grall wrote:
>> There is exactly one case where set/way makes sense, and that's when
>> you're the only CPU left in the system, your MMU is off, and you're
>> about to go down.
> With this and ...
>> On top of bypassing the coherency, S/W CMOs do not prevent lines from
>> migrating from one CPU to another. So you could happily be flushing by
>> S/W, and still end up with dirty lines in your cache. Success!
> ... this I wonder what value emulating those insns then has in the first
> place. Can't you as well simply skip and ignore them, with the same
> (bad) result?

Your call. You could perfectly decide not to emulate them and let the
guest shoot itself in the foot. That will make the validation of 32bit
Linux guests pretty simple (they will fail to boot on most platforms).

The choice we made on KVM is to emulate them slowly but safely, by
converting them into VA CMOs over the full address space. Not pretty,
and quite invasive. But at least I can boot a 32bit kernel with similar
guarantees the kernel would have had if it was on bare metal without any
system cache.


Jazz is not dead. It just smells funny...

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