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[Xen-devel] [PATCH RFC 19/44] x86/boot: Defer TSS/IST setup until later during boot on the BSP



TSS and IST setings are only required for safety when running userspace code.
Until we start executing dom0, the boot path is perfectly capable of handling
exceptions and interrupts without a loaded TSS.

Deferring the TSS setup is necessary to facilitiate moving the BSP onto a
percpu stack, which in turn requires that during boot, there are no IST
references in the IDT.

Correct TSS and IST settings are re-set up in reinit_bsp_stack(), just before
we complete initialisation.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/setup.c | 17 ++++++++++++++++-
 xen/arch/x86/traps.c |  3 ---
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index ffa7ea4..5fa70bd 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -625,6 +625,9 @@ static void __init noreturn reinit_bsp_stack(void)
 {
     unsigned long *stack = (void*)(get_stack_bottom() & ~(STACK_SIZE - 1));
 
+    /* Sanity check that IST settings weren't set up before this point. */
+    ASSERT(MASK_EXTR(idt_tables[0][TRAP_nmi].a, 7UL << 32) == 0);
+
     /* Update TSS and ISTs */
     load_system_tables();
 
@@ -692,7 +695,19 @@ void __init noreturn __start_xen(unsigned long mbi_p)
     percpu_init_areas();
 
     init_idt_traps();
-    load_system_tables();
+    {
+        const struct desc_ptr gdtr = {
+            .base = (unsigned long)this_cpu(gdt_table) - 
FIRST_RESERVED_GDT_BYTE,
+            .limit = LAST_RESERVED_GDT_BYTE,
+        };
+        const struct desc_ptr idtr = {
+            .base = (unsigned long)idt_table,
+            .limit = (IDT_ENTRIES * sizeof(idt_entry_t)) - 1,
+        };
+
+        lgdt(&gdtr);
+        lidt(&idtr);
+    }
 
     smp_prepare_boot_cpu();
     sort_exception_tables();
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index d06ad69..3eab6d3 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1883,9 +1883,6 @@ void __init init_idt_traps(void)
     set_intr_gate(TRAP_machine_check,&machine_check);
     set_intr_gate(TRAP_simd_error,&simd_coprocessor_error);
 
-    /* Specify dedicated interrupt stacks for NMI, #DF, and #MC. */
-    enable_each_ist(idt_table);
-
     /* CPU0 uses the master IDT. */
     idt_tables[0] = idt_table;
 
-- 
2.1.4


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