[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH RFC 42/44] x86/smp: Allocate a percpu linear range for the TSS
With all CPUs using the same virtual stack mapping, the TSS rsp0/ist[0..2] values are compile-time constant. Therefore, we can use a single read-only TSS for the whole system. To faciliate this, a new .rodata.page_aligned section needs introducing. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- xen/arch/x86/smpboot.c | 6 ++++++ xen/arch/x86/traps.c | 29 +++++++++++++++++++++++++++++ xen/arch/x86/xen.lds.S | 2 ++ xen/include/asm-x86/config.h | 1 + xen/include/asm-x86/processor.h | 2 ++ 5 files changed, 40 insertions(+) diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index 77ee883..fa99e4d 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -800,6 +800,12 @@ static int cpu_smpboot_alloc_common(unsigned int cpu) if ( rc ) goto out; + /* Map the TSS. */ + rc = percpu_map_frame(cpu, PERCPU_TSS_MAPPING, + virt_to_page(&global_tss), PAGE_HYPERVISOR_RO); + if ( rc ) + goto out; + /* Allocate space for the mapcache L1e's... */ rc = percpu_alloc_l1t(cpu, PERCPU_MAPCACHE_START, &pg); if ( rc ) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 493f8f3..0ab10ba 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -108,6 +108,35 @@ __section(".bss.page_aligned") __aligned(PAGE_SIZE); /* Pointer to the IDT of every CPU. */ idt_entry_t *idt_tables[NR_CPUS] __read_mostly; +/* Global TSS. All stack entry points are identical on each CPU. */ +const struct tss_struct global_tss +__section(".rodata.page_aligned") __aligned(PAGE_SIZE) = +{ + /* Main stack for interrupts/exceptions. */ + .rsp0 = (PERCPU_STACK_MAPPING + STACK_SIZE - + sizeof(struct cpu_info) + + offsetof(struct cpu_info, guest_cpu_user_regs.es)) , + + /* Ring 1 and 2 stacks poisoned. */ + .rsp1 = 0x8600111111111111ul, + .rsp2 = 0x8600111111111111ul, + + /* + * MCE, NMI and Double Fault handlers get their own stacks. + * All others poisoned. + */ + .ist = { + [IST_MCE - 1] = PERCPU_STACK_MAPPING + IST_MCE * PAGE_SIZE, + [IST_DF - 1] = PERCPU_STACK_MAPPING + IST_DF * PAGE_SIZE, + [IST_NMI - 1] = PERCPU_STACK_MAPPING + IST_NMI * PAGE_SIZE, + + [IST_MAX ... ARRAY_SIZE(global_tss.ist) - 1] = + 0x8600111111111111ul, + }, + + .bitmap = IOBMP_INVALID_OFFSET, +}; + void (*ioemul_handle_quirk)( u8 opcode, char *io_emul_stub, struct cpu_user_regs *regs); diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index d5e8821..3456b4c 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -77,6 +77,8 @@ SECTIONS __2M_rodata_start = .; /* Start of 2M superpages, mapped RO. */ .rodata : { _srodata = .; + *(.rodata.page_aligned) + . = ALIGN(PAGE_SIZE); /* Bug frames table */ __start_bug_frames = .; *(.bug_frames.0) diff --git a/xen/include/asm-x86/config.h b/xen/include/asm-x86/config.h index 3974748..caff09f 100644 --- a/xen/include/asm-x86/config.h +++ b/xen/include/asm-x86/config.h @@ -283,6 +283,7 @@ extern unsigned long xen_phys_start; /* Mappings in the percpu area: */ #define PERCPU_IDT_MAPPING (PERCPU_LINEAR_START + KB(4)) +#define PERCPU_TSS_MAPPING (PERCPU_LINEAR_START + KB(128)) #define PERCPU_MAPCACHE_L1ES (PERCPU_LINEAR_START + MB(2) + KB(12)) #define PERCPU_MAPCACHE_START (PERCPU_LINEAR_START + MB(4)) diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index c206080..22882a6 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -475,6 +475,8 @@ static inline void disable_each_ist(idt_entry_t *idt) extern idt_entry_t idt_table[]; extern idt_entry_t *idt_tables[]; +extern const struct tss_struct global_tss; + DECLARE_PER_CPU(struct tss_struct, init_tss); extern void init_int80_direct_trap(struct vcpu *v); -- 2.1.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |