Re: [Xen-devel] [PATCH v3 10/25] x86emul: support 3DNow! insns

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 02/02/18 15:22, Jan Beulich wrote:
>>>> On 02.02.18 at 14:02, <andrew.cooper3@xxxxxxxxxx> wrote:
>> On 07/12/17 14:05, Jan Beulich wrote:
>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>>> @@ -355,6 +355,36 @@ static const struct {
>>>      [0xff] = { ModRM }
>>>  };
>>>  
>>> +static const uint16_t _3dnow_table[16] = {
>> Comment explaining how these mappings work?  It looks like nibble
>> splits, but I still can't work out how to crossreference with the opcode
>> tables.
> Will do. Array index is high opcode nibble, bit index is low opcode
> nibble.
>
>>> +    [0x0] = (1 << 0xd) /* pi2fd */,
>>> +    [0x1] = (1 << 0xd) /* pf2id */,
>>> +    [0x9] = (1 << 0x0) /* pfcmpge */ |
>>> +            (1 << 0x4) /* pfmin */ |
>>> +            (1 << 0x6) /* pfrcp */ |
>>> +            (1 << 0x7) /* pfrsqrt */ |
>>> +            (1 << 0xa) /* pfsub */ |
>>> +            (1 << 0xe) /* pfadd */,
>>> +    [0xa] = (1 << 0x0) /* pfcmpge */ |
>>> +            (1 << 0x4) /* pfmax */ |
>>> +            (1 << 0x6) /* pfrcpit1 */ |
>>> +            (1 << 0x7) /* pfrsqit1 */ |
>>> +            (1 << 0xa) /* pfsubr */ |
>>> +            (1 << 0xe) /* pfacc */,
>>> +    [0xb] = (1 << 0x0) /* pfcmpeq */ |
>>> +            (1 << 0x4) /* pfmul */ |
>>> +            (1 << 0x6) /* pfrcpit2 */ |
>>> +            (1 << 0x7) /* pmulhrw */ |
>>> +            (1 << 0xf) /* pavgusb */,
>>> +};
>>> +
>>> +static const uint16_t _3dnow_ext_table[16] = {
>>> +    [0x1] = (1 << 0xd) /* pi2fw */,
>>> +    [0x1] = (1 << 0xc) /* pf2iw */,
>> You presumably want an | in here instead?
> No, the first of the two lines is wrong and needs to be
>
>     [0x0] = (1 << 0xc) /* pi2fw */,
>
> (wrong post-copy-and-paste editing).
>
>>> @@ -5505,6 +5537,26 @@ x86_emulate(
>>>      case X86EMUL_OPC(0x0f, 0x19) ... X86EMUL_OPC(0x0f, 0x1f): /* nop */
>>>          break;
>> 0f 0d prefetches?  They are 3DNow instructions, but available on later
>> processors.
> And it is for that latter reason (I assume) that we have these
> already.

Ah.  I see now that they are just out of context above this hunk.

Sorry for the noise.

~Andrew

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