[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v3 4/4] hvm/svm: Enable CR events
The CR_INTERCEPT_CR3_WRITE intercept is out of the vmcb->_cr_intercepts so the AMD arch can't intercept CR events. This patch implements the CR intercept by adding the flag on a write_ctrlreg event. The monitor write ctrlreg event is moved from the Intel side to the common capabilities side. We just need to enable the SVM intercept and then hvm_mov_to_cr() will forward the event on to the monitor when appropriate. Signed-off-by: Alexandru Isaila <aisaila@xxxxxxxxxxxxxxx> Acked-by: Tamas K Lengyel <tamas@xxxxxxxxxxxxx> --- xen/arch/x86/hvm/svm/svm.c | 11 +++++++++++ xen/include/asm-x86/monitor.h | 6 +++--- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 5092b12..89c628e 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -60,6 +60,7 @@ #include <asm/apic.h> #include <asm/debugger.h> #include <asm/hvm/monitor.h> +#include <asm/monitor.h> #include <asm/xstate.h> void svm_asm_do_resume(void); @@ -560,6 +561,16 @@ void svm_update_guest_cr(struct vcpu *v, unsigned int cr) svm_fpu_enter(v); } + if ( paging_mode_hap(v->domain) ) + { + uint32_t intercepts = vmcb_get_cr_intercepts(vmcb); + + /* Trap CR3 updates if CR3 memory events are enabled. */ + if ( v->domain->arch.monitor.write_ctrlreg_enabled & + monitor_ctrlreg_bitmask(VM_EVENT_X86_CR3) ) + vmcb_set_cr_intercepts(vmcb, intercepts | CR_INTERCEPT_CR3_WRITE); + } + value = v->arch.hvm_vcpu.guest_cr[0] | hw_cr0_mask; if ( !paging_mode_hap(v->domain) ) value |= X86_CR0_PG | X86_CR0_WP; diff --git a/xen/include/asm-x86/monitor.h b/xen/include/asm-x86/monitor.h index 6b886af..217f3d4 100644 --- a/xen/include/asm-x86/monitor.h +++ b/xen/include/asm-x86/monitor.h @@ -79,12 +79,12 @@ static inline uint32_t arch_monitor_get_capabilities(struct domain *d) capabilities = ((1U << XEN_DOMCTL_MONITOR_EVENT_GUEST_REQUEST) | (1U << XEN_DOMCTL_MONITOR_EVENT_SOFTWARE_BREAKPOINT) | - (1U << XEN_DOMCTL_MONITOR_EVENT_MOV_TO_MSR)); + (1U << XEN_DOMCTL_MONITOR_EVENT_MOV_TO_MSR) | + (1U << XEN_DOMCTL_MONITOR_EVENT_WRITE_CTRLREG)); if( cpu_has_vmx ) { - capabilities |= (1U << XEN_DOMCTL_MONITOR_EVENT_WRITE_CTRLREG) | - (1U << XEN_DOMCTL_MONITOR_EVENT_DEBUG_EXCEPTION) | + capabilities |= (1U << XEN_DOMCTL_MONITOR_EVENT_DEBUG_EXCEPTION) | (1U << XEN_DOMCTL_MONITOR_EVENT_CPUID) | (1U << XEN_DOMCTL_MONITOR_EVENT_INTERRUPT) | (1U << XEN_DOMCTL_MONITOR_EVENT_EMUL_UNIMPLEMENTED); -- 2.7.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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