[Xen-devel] [PATCH v2 1/2] x86/hvm: introduce cr_mask to store trapped bits of CR accesses

[Roger Pau Monne <roger.pau@xxxxxxxxxx>]

At the moment this is currently set at VMCS creation and not changed,
but further patches are going to change the CR4 mask at runtime.

Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
---
Cc: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
Cc: Jan Beulich <jbeulich@xxxxxxxx>
Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Cc: Jun Nakajima <jun.nakajima@xxxxxxxxx>
Cc: Kevin Tian <kevin.tian@xxxxxxxxx>
---
Changes since v1:
 - New in this version.
---
 xen/arch/x86/hvm/svm/vmcb.c    | 1 +
 xen/arch/x86/hvm/vmx/vmcs.c    | 1 +
 xen/include/asm-x86/hvm/vcpu.h | 3 +++
 3 files changed, 5 insertions(+)

diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 0e6cba5b7b..fdb796ade1 100644
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -169,6 +169,7 @@ static int construct_vmcb(struct vcpu *v)
     vmcb->tr.base = 0;
     vmcb->tr.limit = 0xff;
 
+    v->arch.hvm_vcpu.mask_cr[0] = v->arch.hvm_vcpu.mask_cr[4] = ~0UL;
     v->arch.hvm_vcpu.guest_cr[0] = X86_CR0_PE | X86_CR0_ET;
     hvm_update_guest_cr(v, 0);
 
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index e7818caed0..e3328742e0 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -1165,6 +1165,7 @@ static int construct_vmcs(struct vcpu *v)
 
     __vmwrite(CR0_GUEST_HOST_MASK, ~0UL);
     __vmwrite(CR4_GUEST_HOST_MASK, ~0UL);
+    v->arch.hvm_vcpu.mask_cr[0] = v->arch.hvm_vcpu.mask_cr[4] = ~0UL;
 
     __vmwrite(PAGE_FAULT_ERROR_CODE_MASK, 0);
     __vmwrite(PAGE_FAULT_ERROR_CODE_MATCH, 0);
diff --git a/xen/include/asm-x86/hvm/vcpu.h b/xen/include/asm-x86/hvm/vcpu.h
index d93166fb92..811d4c10ae 100644
--- a/xen/include/asm-x86/hvm/vcpu.h
+++ b/xen/include/asm-x86/hvm/vcpu.h
@@ -156,6 +156,9 @@ struct hvm_vcpu {
      */
     unsigned long       hw_cr[5];
 
+    /* Cached copy of the trapped bits of CRs. Used for CR0 and CR4. */
+    unsigned long       mask_cr[5];
+
     struct vlapic       vlapic;
     s64                 cache_tsc_offset;
     u64                 guest_time;
-- 
2.16.1


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