[Xen-devel] [PATCH v2 11/17] arm64: vgic-v3: Add ICV_IGRPEN0_EL1 handler

[Manish Jaggi <manish.jaggi@xxxxxxxxxx>]

This patch is ported to xen from linux commit:
fbc48a0011deb3d51cb657ca9c0f9083f41c0665
(KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler)

Add a handler for reading/writing the guest's view of the
ICC_IGRPEN0_EL1 register, which is located in the ICH_VMCR_EL2.VENG0
field.

Signed-off-by: Manish Jaggi <manish.jaggi@xxxxxxxxxx>
---
 xen/arch/arm/arm64/vgic-v3-sr.c     | 33 +++++++++++++++++++++++++++++++++
 xen/include/asm-arm/arm64/sysregs.h |  1 +
 2 files changed, 34 insertions(+)

diff --git a/xen/arch/arm/arm64/vgic-v3-sr.c b/xen/arch/arm/arm64/vgic-v3-sr.c
index b938e795a8..d854b1070d 100644
--- a/xen/arch/arm/arm64/vgic-v3-sr.c
+++ b/xen/arch/arm/arm64/vgic-v3-sr.c
@@ -738,6 +738,35 @@ static void vreg_emulate_bpr0(struct cpu_user_regs *regs,
         vgic_v3_write_bpr0(regs, hsr.sysreg.reg);
 }
 
+static void vgic_v3_read_igrpen0(struct cpu_user_regs *regs, int regidx)
+{
+    uint32_t vmcr = READ_SYSREG32(ICH_VMCR_EL2);
+
+    set_user_reg(regs, regidx, !!(vmcr & ICH_VMCR_ENG0_MASK));
+}
+
+static void vgic_v3_write_igrpen0(struct cpu_user_regs *regs, int regidx)
+{
+    register_t val = get_user_reg(regs, regidx);
+    uint32_t vmcr = READ_SYSREG32(ICH_VMCR_EL2);
+
+    if ( val & 1 )
+        vmcr |= ICH_VMCR_ENG0_MASK;
+    else
+        vmcr &= ~ICH_VMCR_ENG0_MASK;
+
+    WRITE_SYSREG32(vmcr, ICH_VMCR_EL2);
+}
+
+static void vreg_emulate_igrpen0(struct cpu_user_regs *regs,
+                                 const union hsr hsr)
+{
+    if ( hsr.sysreg.read )
+        vgic_v3_read_igrpen0(regs, hsr.sysreg.reg);
+    else
+        vgic_v3_write_igrpen0(regs, hsr.sysreg.reg);
+}
+
 /*
  * returns true if the register is emulated.
  */
@@ -796,6 +825,10 @@ bool vgic_v3_handle_cpuif_access(struct cpu_user_regs 
*regs)
         vreg_emulate_bpr0(regs, hsr);
         break;
 
+    case HSR_SYSREG_ICC_IGRPEN0_EL1:
+        vreg_emulate_igrpen0(regs, hsr);
+        break;
+
     default:
         ret = false;
         break;
diff --git a/xen/include/asm-arm/arm64/sysregs.h 
b/xen/include/asm-arm/arm64/sysregs.h
index 55e8185f6a..8a4f5b45cb 100644
--- a/xen/include/asm-arm/arm64/sysregs.h
+++ b/xen/include/asm-arm/arm64/sysregs.h
@@ -96,6 +96,7 @@
 #define HSR_SYSREG_ICC_EOIR1_EL1  HSR_SYSREG(3,0,c12,c12,1)
 #define HSR_SYSREG_ICC_HPPIR1_EL1 HSR_SYSREG(3,0,c12,c12,2)
 #define HSR_SYSREG_ICC_BPR0_EL1   HSR_SYSREG(3,0,c12,c8,3)
+#define HSR_SYSREG_ICC_IGRPEN0_EL1 HSR_SYSREG(3,0,c12,c12,6)
 #define HSR_SYSREG_CONTEXTIDR_EL1 HSR_SYSREG(3,0,c13,c0,1)
 
 #define HSR_SYSREG_PMCR_EL0       HSR_SYSREG(3,3,c9,c12,0)
-- 
2.14.1


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxxx
https://lists.xenproject.org/mailman/listinfo/xen-devel