[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 2/3] x86/pv: Introduce and use x86emul_write_dr()
>>> On 12.04.18 at 18:55, <andrew.cooper3@xxxxxxxxxx> wrote: > @@ -2029,7 +2035,17 @@ long set_debugreg(struct vcpu *v, unsigned int reg, > unsigned long value) > if ( v == curr ) > write_debugreg(3, value); > break; > + > + case 4: > + if ( v->arch.pv_vcpu.ctrlreg[4] & X86_CR4_DE ) > + return -ENODEV; > + > + /* Fallthrough */ > case 6: > + /* The upper 32 bits are strictly reserved. */ > + if ( value != (uint32_t)value ) > + return -EINVAL; > + > /* > * DR6: Bits 4-11,16-31 reserved (set to 1). > * Bit 12 reserved (set to 0). How are the upper 32 bits different from the other reserved bits (named in the comment visible here)? > @@ -2039,7 +2055,17 @@ long set_debugreg(struct vcpu *v, unsigned int reg, > unsigned long value) > if ( v == curr ) > write_debugreg(6, value); > break; > + > + case 5: > + if ( v->arch.pv_vcpu.ctrlreg[4] & X86_CR4_DE ) > + return -ENODEV; > + > + /* Fallthrough */ > case 7: > + /* The upper 32 bits are strictly reserved. */ > + if ( value != (uint32_t)value ) > + return -EINVAL; > + > /* > * DR7: Bit 10 reserved (set to 1). > * Bits 11-12,14-15 reserved (set to 0). Same here then. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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