Re: [Xen-devel] [PATCH for-4.11] x86/SVM: Fix intercepted {RD, WR}MSR for the SYS{CALL, ENTER} MSRs

[Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx>]

On 04/25/2018 09:49 AM, Jan Beulich wrote:
> > > > On 24.04.18 at 20:51, <andrew.cooper3@xxxxxxxxxx> wrote:
> > --- a/xen/arch/x86/hvm/svm/svm.c
> > +++ b/xen/arch/x86/hvm/svm/svm.c
> > @@ -1883,6 +1883,22 @@ static int svm_msr_read_intercept(unsigned int msr, 
> > uint64_t *msr_content)
> >       switch ( msr )
> >       {
> >       case MSR_IA32_SYSENTER_CS:
> > +    case MSR_IA32_SYSENTER_ESP:
> > +    case MSR_IA32_SYSENTER_EIP:
> These three do not require sync-ing, as their values aren't read from the VMCB.
> (They do require sync-ing on the write path).
>
> I also don't think this is going to fully resolve Razvan's issue (not the least
> because the code paths you adjust aren't involved in his scenario): As
> pointed out in a private mail, I think vmcb_in_sync needs to start out as
> true for a vCPU, and may need setting to true upon context set and/or
> reset/init emulation.
It indeed does not solve the whole issue - I've tested the patch as soon 
as it was posted (and I've tried a similar strategy for LSTAR alone as 
part of debugging before notifying of the issue). But I think Andrew 
meant it as a separate patch, fixing only the intercept part.
I'll test the vmcb_in_sync suggestion ASAP.


Thanks,
Razvan

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