[Xen-devel] Ping: [PATCH v5 2/2] x86: enable interrupts earlier with XPTI disabled

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 26.06.18 at 09:18,  wrote:
> The STI instances were moved (or added in the INT80 case) to meet TLB
> flush requirements. When XPTI is disabled, they can be put back where
> they were (or omitted in the INT80 case).
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> Tested-by: Juergen Gross <jgross@xxxxxxxx>
> Reviewed-by: Juergen Gross <jgross@xxxxxxxx>
> Reviewed-by: Wei Liu <wei.liu2@xxxxxxxxxx>

I'd not be overly concerned if this was nack-ed for an acceptable
reason, but I'd like to hear so in that case, because the alternative
to this patch is to drop the synthetic NO_XPTI feature flag, which
is not used anywhere else without this change.

Jan

> ---
> v5: Re-base.
> v4: Split off from earlier patch.
> 
> --- a/xen/arch/x86/x86_64/compat/entry.S
> +++ b/xen/arch/x86/x86_64/compat/entry.S
> @@ -200,7 +200,7 @@ ENTRY(cr4_pv32_restore)
>  
>  /* See lstar_enter for entry register state. */
>  ENTRY(cstar_enter)
> -        /* sti could live here when we don't switch page tables below. */
> +        ALTERNATIVE nop, sti, X86_FEATURE_NO_XPTI
>          CR4_PV32_RESTORE
>          movq  8(%rsp),%rax /* Restore %rax. */
>          movq  $FLAT_USER_SS32, 8(%rsp) /* Assume a 64bit domain.  Compat 
> handled lower. */
> @@ -223,7 +223,7 @@ ENTRY(cstar_enter)
>          /* %r12 is still zero at this point. */
>          mov   %r12, STACK_CPUINFO_FIELD(xen_cr3)(%rbx)
>  .Lcstar_cr3_okay:
> -        sti
> +        ALTERNATIVE sti, "", X86_FEATURE_NO_XPTI
>  
>          movq  STACK_CPUINFO_FIELD(current_vcpu)(%rbx), %rbx
>          movq  VCPU_domain(%rbx),%rcx
> --- a/xen/arch/x86/x86_64/entry.S
> +++ b/xen/arch/x86/x86_64/entry.S
> @@ -247,7 +247,7 @@ UNLIKELY_END(exit_cr3)
>   * %ss must be saved into the space left by the trampoline.
>   */
>  ENTRY(lstar_enter)
> -        /* sti could live here when we don't switch page tables below. */
> +        ALTERNATIVE nop, sti, X86_FEATURE_NO_XPTI
>          movq  8(%rsp),%rax /* Restore %rax. */
>          movq  $FLAT_KERNEL_SS,8(%rsp)
>          pushq %r11
> @@ -269,7 +269,7 @@ ENTRY(lstar_enter)
>          /* %r12 is still zero at this point. */
>          mov   %r12, STACK_CPUINFO_FIELD(xen_cr3)(%rbx)
>  .Llstar_cr3_okay:
> -        sti
> +        ALTERNATIVE sti, "", X86_FEATURE_NO_XPTI
>  
>          movq  STACK_CPUINFO_FIELD(current_vcpu)(%rbx), %rbx
>          testb $TF_kernel_mode,VCPU_thread_flags(%rbx)
> @@ -280,7 +280,7 @@ ENTRY(lstar_enter)
>          jmp   test_all_events
>  
>  ENTRY(sysenter_entry)
> -        /* sti could live here when we don't switch page tables below. */
> +        ALTERNATIVE nop, sti, X86_FEATURE_NO_XPTI
>          pushq $FLAT_USER_SS
>          pushq $0
>          pushfq
> @@ -306,7 +306,7 @@ GLOBAL(sysenter_eflags_saved)
>          /* %r12 is still zero at this point. */
>          mov   %r12, STACK_CPUINFO_FIELD(xen_cr3)(%rbx)
>  .Lsyse_cr3_okay:
> -        sti
> +        ALTERNATIVE sti, "", X86_FEATURE_NO_XPTI
>  
>          movq  STACK_CPUINFO_FIELD(current_vcpu)(%rbx), %rbx
>          cmpb  $0,VCPU_sysenter_disables_events(%rbx)
> @@ -356,7 +356,7 @@ ENTRY(int80_direct_trap)
>          /* %r12 is still zero at this point. */
>          mov   %r12, STACK_CPUINFO_FIELD(xen_cr3)(%rbx)
>  .Lint80_cr3_okay:
> -        sti
> +        ALTERNATIVE sti, "", X86_FEATURE_NO_XPTI
>  
>          cmpb  $0,untrusted_msi(%rip)
>  UNLIKELY_START(ne, msi_check)
> 
> 
> 
> 





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