Re: [Xen-devel] [PATCH v2 1/6] x86emul: fix FMA scalar operand sizes

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 03.09.18 at 18:43, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 29/08/18 15:23, Jan Beulich wrote:
>> FMA insns, other than the earlier AVX additions, don't use the low
>> opcode bit to distinguish between single and double vector elements.
> 
> I think I've worked out why "other than the" is so weird to read as a
> native speaker here.  I think you mean "unlike the" in this context.

Changed; I'll try to remember this.

>> While the difference is benign for packed flavors, the scalar ones
>> need to use VEX.W here. Oddly enough the table entries didn't even use
>> simd_scalar_fp, but uniformly used simd_packed_fp (implying the
>> distinction was by [VEX-encoded] opcode prefix).
> 
> Was this a bug in the FMA patch then?

Yes.

>> Split simd_scalar_fp into simd_scalar_opc and simd_scalar_vexw, and
>> correct 
> 
> Missing the rest of the sentence?  (v1 was similar)

Oops: "...and correct FMA scalar table entries to use the latter."

>> Also correct the scalar insn comments (they only ever use XMM registers
>> as operands).
>>
>> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> 
> As for the code content, Reviewed-by: Andrew Cooper
> <andrew.cooper3@xxxxxxxxxx>

Thanks.

Jan



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