Re: [Xen-devel] [PATCH v2 3/5] x86: Fix APIC MSR constant names

[Roger Pau Monné <roger.pau@xxxxxxxxxx>]

On Wed, Mar 07, 2018 at 06:58:34PM +0000, Andrew Cooper wrote:
> We currently have MSR_IA32_APICBASE and MSR_IA32_APICBASE_MSR which are
> synonymous from a naming point of view, but refer to very different things.
> 
> Rename the x2APIC MSRs to MSR_X2APIC_*, which are shorter constants and
> visually separate the register function from the generic APIC name.  For the
> case ranges, introduce MSR_X2APIC_LAST, rather than relying on the knowledge
> that there are 0x3ff MSRs architecturally reserved for x2APIC functionality.
> 
> For functionality relating to the APIC_BASE MSR, use MSR_APIC_BASE for the MSR
> itself, but drop the MSR prefix from the other constants to shorten the names.
> In all cases, the fact that we are dealing with the APIC_BASE MSR is obvious
> from the context.
> 
> No functional change (the combined binary is identical).
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

> diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
> index 2b4014c..07f2209 100644
> --- a/xen/include/asm-x86/msr-index.h
> +++ b/xen/include/asm-x86/msr-index.h
> @@ -312,18 +312,21 @@
>  
>  #define MSR_IA32_TSC_ADJUST          0x0000003b
>  
> -#define MSR_IA32_APICBASE            0x0000001b
> -#define MSR_IA32_APICBASE_BSP                (1<<8)
> -#define MSR_IA32_APICBASE_EXTD               (1<<10)
> -#define MSR_IA32_APICBASE_ENABLE     (1<<11)
> -#define MSR_IA32_APICBASE_BASE               0x000ffffffffff000ul
> -#define MSR_IA32_APICBASE_MSR           0x800
> -#define MSR_IA32_APICTPR_MSR            0x808
> -#define MSR_IA32_APICPPR_MSR            0x80a
> -#define MSR_IA32_APICEOI_MSR            0x80b
> -#define MSR_IA32_APICTMICT_MSR          0x838
> -#define MSR_IA32_APICTMCCT_MSR          0x839
> -#define MSR_IA32_APICSELF_MSR           0x83f
> +#define MSR_APIC_BASE                   0x0000001b
> +#define APIC_BASE_BSP                   (1<<8)
> +#define APIC_BASE_EXTD                  (1<<10)
> +#define APIC_BASE_ENABLE                (1<<11)
> +#define APIC_BASE_BASE                  0x000ffffffffff000ul

Maybe those could be indented like:

#define MSR_FOO
#define  FOO_BAR

Thanks, Roger.

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