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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v4 01/44] x86emul: support AVX512 opmask insns
>>> On 25.09.18 at 15:25, <JBeulich@xxxxxxxx> wrote:
> These are all VEX encoded, so the EVEX decoding logic continues to
> remain unused at this point.
>
> The new testcase is deliberately coded in assembly, as a C one would
> have become almost unreadable due to the overwhelming amount of
> __builtin_...() that would need to be used. After all the compiler has
> no underlying type (yet) that could be operated on without builtins,
> other than the vector types used for "normal" SIMD insns.
I've added
"Note that outside of 64-bit mode and despite the SDM not currently
saying so, VEX.W is ignored for the KMOV{D,Q} encodings to/from GPRs,
just like e.g. for the similar VMOV{D,Q}."
here, to clarify why the implementation does not seem to match the
SDM in this regard. I've asked Intel to correct the SDM.
Jan
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