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[Xen-devel] [PATCH v5 00/47] x86emul: fair parts of AVX512 support

01: introduce IMPOSSIBLE()
02: support basic AVX512 moves
03: test for correct EVEX Disp8 scaling
04: also allow running the 32-bit harness on a 64-bit distro
05: use AVX512 logic for emulating V{,P}MASKMOV*
06: support AVX512F legacy-equivalent arithmetic FP insns
07: support AVX512DQ logic FP insns
08: support basic AVX512F FP compare insns
09: support AVX512F misc legacy-equivalent FP insns
10: support AVX512F fused-multiply-add insns
11: support AVX512F legacy-equivalent logic insns
12: support AVX512{F,DQ} FP broadcast insns
13: support AVX512F v{,u}comis{d,s} insns
14: support AVX512{F,BW} packed integer compare insns
15: support AVX512{F,BW} packed integer arithmetic insns
16: use simd_128 also for legacy vector shift insns
17: support AVX512{F,BW} shift/rotate insns
18: support AVX512{F,BW,DQ} extract insns
19: support AVX512{F,BW,DQ} insert insns
20: basic AVX512F testing
21: support AVX512{F,BW,DQ} integer broadcast insns
22: basic AVX512VL testing
23: support AVX512{F,BW} zero- and sign-extending moves
24: support AVX512{F,BW} down conversion moves
25: support AVX512{F,BW} integer unpack insns
26: support AVX512{F,BW,_VBMI} full permute insns
27: support AVX512{F,BW} integer shuffle insns
28: support AVX512{BW,DQ} mask move insns
29: basic AVX512BW testing
30: basic AVX512DQ testing
31: support AVX512F move high/low insns
32: support AVX512F move duplicate insns
33: support AVX512{F,BW,VBMI} permute insns
34: support AVX512BW pack insns
35: support AVX512F floating-point conversion insns
36: support AVX512F legacy-equivalent packed int/FP conversion insns
37: support AVX512F legacy-equivalent scalar int/FP conversion insns
38: support AVX512DQ packed quad-int/FP conversion insns
39: support AVX512{F,DQ} uint-to-FP conversion insns
40: support AVX512{F,DQ} FP-to-uint conversion insns
41: support remaining AVX512F legacy-equivalent insns
42: support remaining AVX512BW legacy-equivalent insns
43: support AVX512{F,ER} reciprocal insns
44: support AVX512F floating point manipulation insns
45: support AVX512DQ floating point manipulation insns
46: support AVX512{F,_VBMI2} compress/expand insns
47: support remaining misc AVX512{F,BW} insns

This adds support for all AVX512BW, AVX512DQ, and AVX512ER insns
as well as everything in AVX512F except for the scatter/gather ones.
For a few other extensions parts get implemented when having close
relatives among the above sets. Where applicable AVX512VL variants
get supported along with their base flavors.

While I'm unaware of conflicts, if in doubt this series applies on
top of the still un-acked v2 of "x86emul: VME/PVI mode fixes".


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