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Re: [Xen-devel] [PATCH v2] libx86: Work around GCC bug with ebx output constrants


  • To: Jan Beulich <JBeulich@xxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Mon, 19 Nov 2018 15:19:42 +0000
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  • Cc: Xen-devel <xen-devel@xxxxxxxxxxxxx>, Wei Liu <wei.liu2@xxxxxxxxxx>, Roger Pau Monne <roger.pau@xxxxxxxxxx>
  • Delivery-date: Mon, 19 Nov 2018 15:20:05 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Openpgp: preference=signencrypt

On 19/11/2018 15:14, Jan Beulich wrote:
>>>> On 19.11.18 at 15:45, <andrew.cooper3@xxxxxxxxxx> wrote:
>> Versions of GCC before 5 can't compile cpuid.c, and fail with the rather 
>> cryptic:
>>
>>   In file included from lib/x86/cpuid.c:3:0:
>>   lib/x86/cpuid.c: In function ‘x86_cpuid_policy_fill_native’:
>>   include/xen/lib/x86/cpuid.h:25:5: error: inconsistent operand constraints 
>> in an ‘asm’
>>        asm ( "cpuid"
>>        ^
>>
>> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
>> ---
>> CC: Jan Beulich <JBeulich@xxxxxxxx>
>> CC: Wei Liu <wei.liu2@xxxxxxxxxx>
>> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
>>
>> v2:
>>  * GCC 5 is fine.  Its cpuid instrinct has none of the PIC workarounds thant 
>> 4.9 have.
>>  * Fix 64bit builds with larger models.
> It is rather odd that 64-bit is also affected - the error gets raised
> even when there's no use of %rbx for GOT accesses. By when
> they need a callee-saved register, they indeed use %rbx instead
> to the ABI-suggested %r15.
>
>> --- a/xen/include/xen/lib/x86/cpuid.h
>> +++ b/xen/include/xen/lib/x86/cpuid.h
>> @@ -20,21 +20,50 @@ struct cpuid_leaf
>>      uint32_t a, b, c, d;
>>  };
>>  
>> +/*
>> + * Versions of GCC before 5 are unable to cope with %rBX output constraints
>> + * when compiling Position Independent Code, and produce a rather cryptic
>> + * error:
>> + *    error: inconsistent operand constraints in an ‘asm’
>> + *
>> + * To work around the issue, use a separate register to hold the the %rBX
>> + * output, and xchg twice to leave %rBX preserved around the asm() 
>> statement.
>> + */
>> +#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && 
>> defined(__i386__)
>> +# define XCHG_BX "xchg %%ebx, %[bx];"
>> +# define BX_CON [bx] "=&r"
>> +#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \
>> +    defined(__x86_64__) && (defined(__code_model_medium__) || \
>> +                            defined(__code_model_large__))
>> +# define XCHG_BX "xchg %%rbx, %q[bx];"
>> +# define BX_CON [bx] "=&r"
>> +#else
>> +# define XCHG_BX ""
>> +# define BX_CON "=&b"
> The & is unnecessary here I think. Preferably with it dropped
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>

That was to match the "=&d" and friends.  I'd prefer to be consistent
(one way or the other).

~Andrew

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