[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v6 15/42] x86emul: support AVX512F move high/low insns
No explicit test harness additions other than the overrides, as the compiler already makes use of the insns. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- v4: New. --- a/tools/tests/x86_emulator/evex-disp8.c +++ b/tools/tests/x86_emulator/evex-disp8.c @@ -253,6 +253,16 @@ static const struct test avx512f_128[] = INSN(insertps, 66, 0f3a, 21, el, d, el), INSN(mov, 66, 0f, 6e, el, dq64, el), INSN(mov, 66, 0f, 7e, el, dq64, el), +// movhlps, , 0f, 12, d + INSN(movhpd, 66, 0f, 16, el, q, vl), + INSN(movhpd, 66, 0f, 17, el, q, vl), + INSN(movhps, , 0f, 16, el_2, d, vl), + INSN(movhps, , 0f, 17, el_2, d, vl), +// movlhps, , 0f, 16, d + INSN(movlpd, 66, 0f, 12, el, q, vl), + INSN(movlpd, 66, 0f, 13, el, q, vl), + INSN(movlps, , 0f, 12, el_2, d, vl), + INSN(movlps, , 0f, 13, el_2, d, vl), INSN(movq, f3, 0f, 7e, el, q, el), INSN(movq, 66, 0f, d6, el, q, el), }; --- a/tools/tests/x86_emulator/simd.h +++ b/tools/tests/x86_emulator/simd.h @@ -266,6 +266,12 @@ OVR(movd); OVR(movq); OVR_SFP(mov); OVR_VFP(mova); +OVR(movhlps); +OVR(movhpd); +OVR(movhps); +OVR(movlhps); +OVR(movlpd); +OVR(movlps); OVR_VFP(movnt); OVR_VFP(movu); OVR_FP(mul); --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -286,11 +286,11 @@ static const struct twobyte_table { [0x0f] = { ModRM|SrcImmByte }, [0x10] = { DstImplicit|SrcMem|ModRM|Mov, simd_any_fp, d8s_vl }, [0x11] = { DstMem|SrcImplicit|ModRM|Mov, simd_any_fp, d8s_vl }, - [0x12] = { DstImplicit|SrcMem|ModRM|Mov, simd_other }, - [0x13] = { DstMem|SrcImplicit|ModRM|Mov, simd_other }, + [0x12] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 }, + [0x13] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, [0x14 ... 0x15] = { DstImplicit|SrcMem|ModRM, simd_packed_fp, d8s_vl }, - [0x16] = { DstImplicit|SrcMem|ModRM|Mov, simd_other }, - [0x17] = { DstMem|SrcImplicit|ModRM|Mov, simd_other }, + [0x16] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 }, + [0x17] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, [0x18 ... 0x1f] = { ImplicitOps|ModRM }, [0x20 ... 0x21] = { DstMem|SrcImplicit|ModRM }, [0x22 ... 0x23] = { DstImplicit|SrcMem|ModRM }, @@ -6016,6 +6016,26 @@ x86_emulate( op_bytes = 8; goto simd_0f_fp; + case X86EMUL_OPC_EVEX_66(0x0f, 0x12): /* vmovlpd m64,xmm,xmm */ + CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x13): /* vmovlp{s,d} xmm,m64 */ + case X86EMUL_OPC_EVEX_66(0x0f, 0x16): /* vmovhpd m64,xmm,xmm */ + CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x17): /* vmovhp{s,d} xmm,m64 */ + generate_exception_if(ea.type != OP_MEM, EXC_UD); + /* fall through */ + case X86EMUL_OPC_EVEX(0x0f, 0x12): /* vmovlps m64,xmm,xmm */ + /* vmovhlps xmm,xmm,xmm */ + case X86EMUL_OPC_EVEX(0x0f, 0x16): /* vmovhps m64,xmm,xmm */ + /* vmovlhps xmm,xmm,xmm */ + generate_exception_if((evex.lr || evex.opmsk || evex.br || + evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK)), + EXC_UD); + host_and_vcpu_must_have(avx512f); + if ( (d & DstMask) != DstMem ) + d &= ~TwoOp; + op_bytes = 8; + fault_suppression = false; + goto simd_zmm; + case X86EMUL_OPC_F3(0x0f, 0x12): /* movsldup xmm/m128,xmm */ case X86EMUL_OPC_VEX_F3(0x0f, 0x12): /* vmovsldup {x,y}mm/mem,{x,y}mm */ case X86EMUL_OPC_F2(0x0f, 0x12): /* movddup xmm/m64,xmm */ _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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