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Re: [Xen-devel] [PATCH] x86emul: permit SAE for V{,U}COMIS{S,D}

>>> On 10.12.18 at 14:20, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 10/12/2018 11:32, Jan Beulich wrote:
>> The avx512_vlen_check() invocation needs to be conditional.
>> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> I'm not sure if I've asked before, but do LIG instructions really #UD
> for L=3 ?  I don't see any documentation to this effect.

At least on my Core i9 they do; I have a pending query with Intel
as to the intentions in general and the lack of clear documentation,
as well as to the behavior on the Knights line of processors (where
there is no AVX512VL, and hence where special casing VL=128 and
VL=256 but not VL=<whatever-3-will- mean> are at least

>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -6179,7 +6179,8 @@ x86_emulate(
>>                                 evex.w != evex.pfx),
>>                                EXC_UD);
>>          host_and_vcpu_must_have(avx512f);
>> -        avx512_vlen_check(true);
>> +        if ( !evex.br )
> On the subject of ineligibility of the code, what about #define sae br ?
> That way, this would read "if ( !evex.sae ) check_vlen()"

The three meanings of the bit can't reasonably all be conveyed
by a acceptably short name. Of course we can introduce aliases
like the above, but please recall that
- "br" stands for _b_roadcast or _r_ounding, not _br_oadcast,
- we'd need another alias for the embedded-rounding case then.
If you're convinced this is a good idea, I can do respective
renaming both to what may already be committed as well as to
the rest of the still pending series.

But personally I'd rather not go that route, to make it easier to
connect with one another all the uses/checks of that bit. This is
in particular because for insns which allow neither broadcast nor
rounding/SAE, I certainly don't want to check the same bit twice
(via its different names).


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