Re: [Xen-devel] [PATCH for-4.12 v3 4/5] xen/arm: Implement Set/Way operations

[Julien Grall <julien.grall@xxxxxxx>]

Hi,

On 14/12/2018 21:22, Stefano Stabellini wrote:
> On Fri, 14 Dec 2018, Julien Grall wrote:
> > +
> > +    /*
> > +     * The full P2M may require some cleaning (e.g when emulation
> > +     * set/way). As the action can take a long time, it requires
> > +     * preemption. So this is deferred until we return to the guest.
> Please replace the last sentence of this comment with:
>
> "It is deferred until we return to guest, where we can more easily check
> for softirqs and preempt the vcpu safely."
Ok.

> > +     */
> > +    bool need_flush_to_ram;
> > +
> >   }  __cacheline_aligned;
> >   
> >   void vcpu_show_execution_state(struct vcpu *);
> > diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h
> > index a633e27cc9..79abcb5a63 100644
> > --- a/xen/include/asm-arm/p2m.h
> > +++ b/xen/include/asm-arm/p2m.h
> > @@ -6,6 +6,8 @@
> >   #include <xen/rwlock.h>
> >   #include <xen/mem_access.h>
> >   
> > +#include <asm/current.h>
> > +
> >   #define paddr_bits PADDR_BITS
> >   
> >   /* Holds the bit size of IPAs in p2m tables.  */
> > @@ -237,6 +239,12 @@ bool p2m_resolve_translation_fault(struct domain *d, gfn_t 
> > gfn);
> >    */
> >   int p2m_cache_flush_range(struct domain *d, gfn_t *pstart, gfn_t end);
> >   
> > +void p2m_set_way_flush(struct vcpu *v);
> > +
> > +void p2m_toggle_cache(struct vcpu *v, bool was_enabled);
> > +
> > +void p2m_flush_vm(struct vcpu *v);
> > +
> >   /*
> >    * Map a region in the guest p2m with a specific p2m type.
> >    * The memory attributes will be derived from the p2m type.
> > @@ -364,6 +372,18 @@ static inline int set_foreign_p2m_entry(struct domain *d, 
> > unsigned long gfn,
> >       return -EOPNOTSUPP;
> >   }
> >   
> > +/*
> > + * A vCPU has cache enabled only when the MMU is enabled and data cache
> > + * is enabled.
> > + */
> > +static inline bool vcpu_has_cache_enabled(struct vcpu *v)
> > +{
> > +    /* Only works with the current vCPU */
> > +    ASSERT(current == v);
> > +
> > +    return (READ_SYSREG32(SCTLR_EL1) & (SCTLR_C|SCTLR_M)) == (SCTLR_C|SCTLR_M);
> Line > 80
No, it is 79 characters (not counting \n). Why do you think it is more than 80 
characters?
Cheers,

--
Julien Grall

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