Re: [Xen-devel] [PATCH v5 1/4] amd-iommu: add flush iommu_ops

[Paul Durrant <Paul.Durrant@xxxxxxxxxx>]

> -----Original Message-----
> From: Xen-devel [mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxxx] On Behalf
> Of Woods, Brian
> Sent: 20 December 2018 19:46
> To: Paul Durrant <Paul.Durrant@xxxxxxxxxx>; xen-devel@xxxxxxxxxxxxxxxxxxxx
> Cc: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>; Wei Liu
> <wei.liu2@xxxxxxxxxx>; Suthikulpanit, Suravee
> <Suravee.Suthikulpanit@xxxxxxx>; Roger Pau Monne <roger.pau@xxxxxxxxxx>
> Subject: Re: [Xen-devel] [PATCH v5 1/4] amd-iommu: add flush iommu_ops
> 
> From: Paul Durrant <paul.durrant@xxxxxxxxxx>
> Sent: Monday, December 17, 2018 3:22 AM
> To: xen-devel@xxxxxxxxxxxxxxxxxxxx
> Cc: Paul Durrant; Suthikulpanit, Suravee; Woods, Brian; Andrew Cooper; Wei
> Liu; Roger Pau Monné
> Subject: [PATCH v5 1/4] amd-iommu: add flush iommu_ops
> 
> The iommu_ops structure contains two methods for flushing: 'iotlb_flush'
> and
> 'iotlb_flush_all'. This patch adds implementations of these for AMD
> IOMMUs.
> 
> The iotlb_flush method takes a base DFN and a (4k) page count, but the
> flush needs to be done by page order (i.e. 0, 9 or 18). Because a flush
> operation is fairly expensive to perform, the code calculates the minimum
> order single flush that will cover the specified page range rather than
> performing multiple flushes.
> 
> Signed-off-by: Paul Durrant <paul.durrant@xxxxxxxxxx>
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
> 
> Acked-by: Brian Woods <brian.woods@xxxxxxx>

Thanks Brian,

  Paul

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