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Re: [Xen-devel] [PATCH 5/6] x86/AMD: Fix handling of FPU pointer on Zen hardware



>>> On 28.12.18 at 17:11, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 28/12/2018 15:43, Roger Pau Monné wrote:
>> On Fri, Dec 28, 2018 at 12:39:35PM +0000, Andrew Cooper wrote:
>>> AMD hardware before Zen doesn't safe/restore the FPU error pointers
>>> unless an unmasked FPU exception is pending.  Zen processors have a
>>> feature bit indicating that this (mis)behaviour no longer exists.
>>>
>>> Express the common logic in terms of cpu_bug_fpu_err_ptr as Hygon
>>> processors (being Zen derivatives) won't inherit this behaviour.
>>>
>>> While at it, fix a performance issue with the workaround, which I should
>>> have noticed by now.  Looking at the FPU state slows the context switch
>>> path down, as it is a moderately complicated unpredictable condition
>>> which will evaluate to true for all 64bit OSes and most 32bit ones.
>>>
>>> Leave the sole condition being the easily-predictable
>>> cpu_bug_fpu_err_ptr as the asm sequence is needed in ~100% of cases
>>> these days on affected hardware.
>> I'm not that familiar with the FPU registers, but I assume current
>> code checks whether there's an exception pending before decoding
>> whether the error pointers should be cleared?
> 
> The current code has two checks.  One, whether you're trying to load
> floating point state, and the second is whether there is an unmasked
> floating point exception.
> 
> All callers, except those out of the emulator, restore FP state, and the
> statistical likelihood of there being an unmasked floating point
> exception pending is low when the x87 FPU is in use, and 0 on 64bit
> systems which use SSE2 as their base floating point support.

Well, not exactly zero, but even lower: 80-bit math (i.e. long double
plus the necessary compiler option) requires use of the x87 FPU even
in 64-bit mode.

Jan


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