Re: [Xen-devel] [PATCH] x86/spec_ctrl: Extend repoline safey calcuations for eIBRS and Atom parts

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 18.03.19 at 14:04, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 18/03/2019 11:58, Jan Beulich wrote:
>>>>> On 18.03.19 at 12:27, <andrew.cooper3@xxxxxxxxxx> wrote:
>>> However, an additional meaning of Enhanced IRBS is that the processor may 
>>> not
>>> be retpoline-safe.  The Gemini Lake platform, based on the Goldmont+
>>> microarchitecture is the first Atom processor to support eIBRS, even though 
>>> it
>>> is in practice safe.
>> But afaict you don't mark them as safe.
> 
> Correct.  That is deliberate.
> 
>> But then again I don't recall:
>> Performance-wise, is retpoline considered better or worse than IBRS?
>> Depending on that ...
> 
> Retpoline is more performant than IRBS as implemented in microcode, but
> that is not what we are comparing to here.
> 
> Goldmont+ is the first processor with hardware fixes for Spectre v2
> issues.  This means that IBRS isn't implemented behind the scenes with
> "turn off the BTB" or "flush via convoluted means".  There is a proper
> O(1) flush of the BTB for IBPB, and the BTB now tracks the privilege at
> which a prediction was learnt.
> 
> Cascade Lake will (AFAIA) be the first Big-Core processor with eIBRS.

In which case
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>

Jan



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