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Re: [Xen-devel] [PATCH v4 04/15] x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU



On 2019/4/1 16:36, Jan Beulich wrote:
On 30.03.19 at 11:42, <puwen@xxxxxxxx> wrote:
@@ -876,6 +877,10 @@ static int __init vpmu_init(void)
          if ( amd_vpmu_init() )
             vpmu_mode = XENPMU_MODE_OFF;
          break;
+    case X86_VENDOR_HYGON:
+        if ( hygon_vpmu_init() )
+           vpmu_mode = XENPMU_MODE_OFF;
+        break;
      case X86_VENDOR_INTEL:
          if ( core2_vpmu_init() )
             vpmu_mode = XENPMU_MODE_OFF;

While I realize they're missing right now, I would have appreciated
if you had taken the opportunity to add the missing blank lines
between case blocks here.

Okay, will add the missing blank lines in next version patch series.

--- a/xen/arch/x86/cpu/vpmu_amd.c
+++ b/xen/arch/x86/cpu/vpmu_amd.c
@@ -538,28 +538,12 @@ int svm_vpmu_initialise(struct vcpu *v)
      return 0;
  }
-int __init amd_vpmu_init(void)
+static int common_init(void)

__init

Okay, will add it in front of int.

  {
      unsigned int i;
- switch ( current_cpu_data.x86 )
+    if (!num_counters)

Style (missing blanks).

Will add the missing blanks.

+    case 0x17:
+        num_counters = F15H_NUM_COUNTERS;
+        counters = AMD_F15H_COUNTERS;
+        ctrls = AMD_F15H_CTRLS;
+        k7_counters_mirrored = 1;
+        break;
+    case 0x10:

Same as above.

Will add a blank line on top of "case 0x10".

I won't insist on the first item getting addressed, but the other
three should be. They're all mechanical, so could be done while
committing, and with them in place
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>

Thanks.

--
Regards,
Pu Wen


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