Re: [Xen-devel] [PATCH v4 02/15] x86/cpu: Fix common cpuid faulting probing for AMD and Hygon

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 02.04.19 at 12:30, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 01/04/2019 09:40, Jan Beulich wrote:
>>>>> On 30.03.19 at 11:42, <puwen@xxxxxxxx> wrote:
>>> There is no MSR_INTEL_PLATFORM_INFO for AMD and Hygon families. So directly
>>> return false in the function probe_cpuid_faulting() if !cpu_has_hypervisor.
>> I think it would have been nice if you had mentioned the real
>> reason why you want to bypass the MSR accesses. This way it
>> sounds as if the change was only cosmetic, and hence could be
>> left out.
>>
>>> Signed-off-by: Pu Wen <puwen@xxxxxxxx>
>> Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
>>
>> Andrew, I'd like to ask for explicit clarification that you don't object
>> to this adjustment. But if you do, please clarify why.
> 
> We deliberately emulate MSR_INTEL_PLATFORM_INFO on all systems
> 
> This is to support pv-shim, so the L1 Xen can exert faulting control
> over the L2 PV guest, so L2 doesn't see L1's HVM CPUID leaves and choke.
> 
> I suppose its fine to have a !cpu_has_hypervisor exclusion for non-Intel
> systems, but I also don't see much value in it.

But you've see Pu Wen's explanation (of their CPUs hanging on that
RDMSR is attempted)? In a later reply he even claims that this also
happens on some AMD CPUs.

Jan



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