[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Xen-devel] [PATCH] x86/vvmx: Simplify per-CPU memory allocations



 * Use XFREE() instead of opencoding it in nvmx_cpu_dead()
 * Avoid redundant evaluations of per_cpu()
 * Don't allocate vvmcs_buf at all if it isn't going to be used.  It is never
   touched on hardware lacking the VMCS Shadowing feature.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Wei Liu <wei.liu2@xxxxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
CC: Jun Nakajima <jun.nakajima@xxxxxxxxx>
CC: Kevin Tian <kevin.tian@xxxxxxxxx>
---
 xen/arch/x86/hvm/vmx/vvmx.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index 991445e..7bca572 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -40,21 +40,25 @@ static bool nvmx_vcpu_in_vmx(const struct vcpu *v)
 
 int nvmx_cpu_up_prepare(unsigned int cpu)
 {
-    if ( per_cpu(vvmcs_buf, cpu) != NULL )
-        return 0;
+    uint64_t **vvmcs_buf;
 
-    per_cpu(vvmcs_buf, cpu) = xzalloc_array(u64, VMCS_BUF_SIZE);
+    if ( cpu_has_vmx_vmcs_shadowing &&
+         (vvmcs_buf = &per_cpu(vvmcs_buf, cpu)) == NULL )
+    {
+        void *ptr = xzalloc_array(uint64_t, VMCS_BUF_SIZE);
 
-    if ( per_cpu(vvmcs_buf, cpu) != NULL )
-        return 0;
+        if ( !ptr )
+            return -ENOMEM;
 
-    return -ENOMEM;
+        *vvmcs_buf = ptr;
+    }
+
+    return 0;
 }
 
 void nvmx_cpu_dead(unsigned int cpu)
 {
-    xfree(per_cpu(vvmcs_buf, cpu));
-    per_cpu(vvmcs_buf, cpu) = NULL;
+    XFREE(per_cpu(vvmcs_buf, cpu));
 }
 
 int nvmx_vcpu_initialise(struct vcpu *v)
-- 
2.1.4


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxxx
https://lists.xenproject.org/mailman/listinfo/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.