[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2 2/5] x86/cpuidle: really use C1 for "urgent" CPUs
For one on recent AMD CPUs entering C1 (if available at all) requires use of MWAIT, while HLT (i.e. default_idle()) would put the processor into as deep as CC6. And then even on other vendors' CPUs we should avoid entering default_idle() when the intended state can be reached by using the active idle driver's facilities. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -582,12 +582,15 @@ static void acpi_processor_idle(void) u32 exp = 0, pred = 0; u32 irq_traced[4] = { 0 }; - if ( max_cstate > 0 && power && !sched_has_urgent_vcpu() && + if ( max_cstate > 0 && power && (next_state = cpuidle_current_governor->select(power)) > 0 ) { + unsigned int max_state = sched_has_urgent_vcpu() ? ACPI_STATE_C1 + : max_cstate; + do { cx = &power->states[next_state]; - } while ( cx->type > max_cstate && --next_state ); + } while ( cx->type > max_state && --next_state ); if ( next_state ) { if ( cx->type == ACPI_STATE_C3 && power->flags.bm_check && --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -724,11 +724,14 @@ static void mwait_idle(void) u64 before, after; u32 exp = 0, pred = 0, irq_traced[4] = { 0 }; - if (max_cstate > 0 && power && !sched_has_urgent_vcpu() && + if (max_cstate > 0 && power && (next_state = cpuidle_current_governor->select(power)) > 0) { + unsigned int max_state = sched_has_urgent_vcpu() ? ACPI_STATE_C1 + : max_cstate; + do { cx = &power->states[next_state]; - } while (cx->type > max_cstate && --next_state); + } while (cx->type > max_state && --next_state); if (!next_state) cx = NULL; else if (tb_init_done) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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