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Re: [Xen-devel] [PATCH v9 08/23] x86emul: support AVX512PF insns
- To: Jan Beulich <JBeulich@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Thu, 4 Jul 2019 15:44:28 +0100
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- Cc: Wei Liu <wl@xxxxxxx>, RogerPau Monne <roger.pau@xxxxxxxxxx>
- Delivery-date: Thu, 04 Jul 2019 14:44:36 +0000
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Openpgp: preference=signencrypt
On 01/07/2019 12:20, Jan Beulich wrote:
> + /* Clear untouched parts of the mask value. */
> + n = 1 << (4 - ((b & 1) | evex.w));
> + op_mask &= (1 << n) - 1;
> +
> + for ( i = 0; rc == X86EMUL_OKAY && op_mask; ++i )
> + {
> + signed long idx = b & 1 ? index.qw[i] : index.dw[i];
> +
> + if ( !(op_mask & (1 << i)) )
> + continue;
It occurs from my recent foray into UBSAN that op_mask is 64 bits wide,
although it looks like n can be at maximum 16 in this specific case.
If nothing else, using (1u << 1) would reduce the size of the UBSAN
build, but I expect we're soon going to have subtle bugs when we get to
the int8 instructions.
Are there current S/G instructions which can take 32 iterations?
~Andrew
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