Re: [Xen-devel] [PATCH v9 11/23] x86emul: support of AVX512* population count insns

[Jan Beulich <JBeulich@xxxxxxxx>]

On 04.07.2019 16:47, Andrew Cooper wrote:
> On 01/07/2019 12:22, Jan Beulich wrote:
>> --- a/xen/tools/gen-cpuid.py
>> +++ b/xen/tools/gen-cpuid.py
>> @@ -268,7 +268,7 @@ def crunch_numbers(state):
>>            # AVX512 extensions acting on vectors of bytes/words are made
>>            # dependents of AVX512BW (as to requiring wider than 16-bit mask
>>            # registers), despite the SDM not formally making this connection.
>> -        AVX512BW: [AVX512_BF16, AVX512_VBMI, AVX512_VBMI2],
>> +        AVX512BW: [AVX512_BF16, AVX512_BITALG, AVX512_VBMI, AVX512_VBMI2],
> 
> BITALG should be after VBMI2, because everything in this table is
> ordered by bit number.

As said before - there's no ordering by bit number possible here.
The individual features may live on different (sub)leaves. By
what you say BF16 shouldn't be first. The list here clearly is
sorted alphabetically, and imo that's the only future proof sorting
possible (and also for AVX512F, where I had previously offered to
put together a patch to switch to alphabetical ordering, if only we
could agree on that).

> With this fixed, Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

As per above I'm not going to apply this without hearing back from
you.

Jan
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