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[Xen-devel] Ping: [PATCH v4 01/12] AMD/IOMMU: use bit field for extended feature register
- To: Brian Woods <brian.woods@xxxxxxx>, Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
- From: Jan Beulich <JBeulich@xxxxxxxx>
- Date: Tue, 30 Jul 2019 09:14:06 +0000
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- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Delivery-date: Tue, 30 Jul 2019 09:20:57 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
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- Thread-topic: Ping: [PATCH v4 01/12] AMD/IOMMU: use bit field for extended feature register
On 25.07.2019 15:29, Jan Beulich wrote:
> This also takes care of several of the shift values wrongly having been
> specified as hex rather than dec.
>
> Take the opportunity and
> - replace a readl() pair by a single readq(),
> - add further fields.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Brian, Suravee,
getting your ack here would unblock a fair part of the rest of
this series.
Thanks, Jan
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