[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2 17/35] xen/arm64: head: Setup TTBR_EL2 in enable_mmu() and add missing isb
On Mon, 22 Jul 2019, Julien Grall wrote: > At the moment, TTBR_EL2 is setup in create_page_tables(). This is fine > as it is called by every CPUs. > > However, such assumption may not hold in the future. To make change > easier, the TTBR_EL2 is not setup in enable_mmu(). > > Take the opportunity to add the missing isb() to ensure the TTBR_EL2 is > seen before the MMU is turned on. > > Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Makes sense Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> > --- > Changes in v2: > - Patch added > --- > xen/arch/arm/arm64/head.S | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 7541635102..9afd89d447 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -501,9 +501,7 @@ create_page_tables: > cmp x19, #XEN_VIRT_START > cset x25, eq /* x25 := identity map in place, or not > */ > > - /* Write Xen's PT's paddr into TTBR0_EL2 */ > load_paddr x4, boot_pgtable > - msr TTBR0_EL2, x4 > > /* Setup boot_pgtable: */ > load_paddr x1, boot_first > @@ -631,6 +629,11 @@ enable_mmu: > tlbi alle2 /* Flush hypervisor TLBs */ > dsb nsh > > + /* Write Xen's PT's paddr into TTBR0_EL2 */ > + load_paddr x0, boot_pgtable > + msr TTBR0_EL2, x0 > + isb > + > mrs x0, SCTLR_EL2 > orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MMU */ > orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */ > -- > 2.11.0 > _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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