Re: [Xen-devel] [PATCH V4 8/8] iommu/arm: Add Renesas IPMMU-VMSA support

[Oleksandr <olekstysh@xxxxxxxxx>]

On 20.09.19 03:25, Yoshihiro Shimoda wrote:
> Hi Oleksandr-san,
Hi, Shimoda-san


> > From: Oleksandr Tyshchenko, Sent: Saturday, September 14, 2019 12:35 AM
> >
> > From: Oleksandr Tyshchenko <oleksandr_tyshchenko@xxxxxxxx>
> >
> > The IPMMU-VMSA is VMSA-compatible I/O Memory Management Unit (IOMMU)
> > which provides address translation and access protection functionalities
> > to processing units and interconnect networks.
> >
> > Please note, current driver is supposed to work only with newest
> > R-Car Gen3 SoCs revisions which IPMMU hardware supports stage 2 translation
> > table format and is able to use CPU's P2M table as is if one is
> > 3-level page table (up to 40 bit IPA).
> >
> > The major differences compare to the Linux driver are:
> >
> > 1. Stage 1/Stage 2 translation. Linux driver supports Stage 1
> > translation only (with Stage 1 translation table format). It manages
> > page table by itself. But Xen driver supports Stage 2 translation
> > (with Stage 2 translation table format) to be able to share the P2M
> > with the CPU. Stage 1 translation is always bypassed in Xen driver.
> >
> > So, Xen driver is supposed to be used with newest R-Car Gen3 SoC revisions
> > only (H3 ES3.0, M3-W+, etc.) which IPMMU H/W supports stage 2 translation
> > table format.
> >
> > 2. AArch64 support. Linux driver uses VMSAv8-32 mode, while Xen driver
> > enables Armv8 VMSAv8-64 mode to cover up to 40 bit input address.
> >
> > 3. Context bank (sets of page table) usage. In Xen, each context bank is
> > mapped to one Xen domain. So, all devices being pass throughed to the
> > same Xen domain share the same context bank.
> >
> > 4. IPMMU device tracking. In Xen, all IOMMU devices are managed
> > by single driver instance. So, driver uses global list to keep track
> > of registered IPMMU devices.
> >
> > Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@xxxxxxxx>
> > CC: Julien Grall <julien.grall@xxxxxxx>
> > CC: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> Thank you for the patch. I have reviewed this patch about the IPMMU hardware 
> bits,
> so,
>
> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> [for the 
> IPMMU H/W bits]
Thank you.


...

I have checked new driver version on R-Car Gen3 M3N SoC and can confirm 
it works.
--
Regards,

Oleksandr Tyshchenko


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