Re: [Xen-devel] [PATCH RFC] pass-through: sync pir to irr after msix vector been updated

[Roger Pau Monné <roger.pau@xxxxxxxxxx>]

On Fri, Sep 27, 2019 at 10:42:02AM +0200, Roger Pau Monné wrote:
> Also, I think I'm still confused by this, I've just realized that the
> PI descriptor seems to be moved from one vCPU to another without
> clearing PIRR, and hence I'm not sure why you are losing interrupts in
> that case. I need to look deeper in order to figure out what's going
> on there.

Forget about the above paragraph, it's completely bogus. The vector on
the new vCPU might be completely different, and hence the PIRR must
be flushed before moving. Let me try to come up with a patch for you
to test.

Thanks, Roger.

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