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Re: [Xen-devel] [PATCH 3/3] AMD/IOMMU: replace a few literal numbers
- To: Jan Beulich <jbeulich@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Mon, 10 Feb 2020 14:28:34 +0000
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On 05/02/2020 09:43, Jan Beulich wrote:
> Introduce IOMMU_PDE_NEXT_LEVEL_{MIN,MAX} to replace literal 1, 6, and 7
> instances. While doing so replace two uses of memset() by initializers.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
This does not look to be an improvement. IOMMU_PDE_NEXT_LEVEL_MIN is
definitely bogus, and in all cases, a literal 1 is better, because that
is how we describe pagetable levels.
Something to replace literal 6/7 probably is ok, but doesn't want to be
done like this.
The majority of the problems here as caused by iommu_pde_from_dfn()'s
silly ABI. The pt_mfn[] array is problematic (because it is used as a
1-based array, not 0-based) and useless because both callers only want
the 4k-equivelent mfn. Fixing the ABI gets rid of quite a lot of wasted
stack space, every use of '1', and every upper bound other than the bug
on and amd_iommu_get_paging_mode().
> ---
> TBD: We should really honor the hats field of union
> amd_iommu_ext_features, but the specification (or at least the
> parts I did look at in the course of putting together this patch)
> is unclear about the maximum valid value in case EFRSup is clear.
It is available from PCI config space (Misc0 register, cap+0x10) even on
first gen IOMMUs, and the IVRS table in Type 10.
I'm honestly not sure why the information was duplicated into EFR, other
than perhaps for providing the information in a more useful format.
~Andrew
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