RE: Ping²: [PATCH] x86/HVM: fix AMD ECS handling for Fam 10

[Paul Durrant <xadimgnik@xxxxxxxxx>]

> -----Original Message-----
> From: Jan Beulich <jbeulich@xxxxxxxx>
> Sent: 31 March 2020 13:16
> To: Paul Durrant <paul@xxxxxxx>
> Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>; 
> xen-devel@xxxxxxxxxxxxxxxxxxxx; Wei Liu <wl@xxxxxxx>;
> Roger Pau Monné <roger.pau@xxxxxxxxxx>
> Subject: Ping²: [PATCH] x86/HVM: fix AMD ECS handling for Fam 10
> 
> On 16.03.2020 14:41, Andrew Cooper wrote:
> > On 16/03/2020 11:00, Jan Beulich wrote:
> >> The involved comparison was, very likely inadvertently, converted from
> >>> = to > when making changes unrelated to the actual family range.
> >>
> >> Fixes: 9841eb71ea87 ("x86/cpuid: Drop a guests cached x86 family and model 
> >> information")
> >> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> >
> > Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> 
> Paul?
> 

Sorry, missed that. My mail filters appear to have let me down...

> >> --- a/xen/arch/x86/hvm/ioreq.c
> >> +++ b/xen/arch/x86/hvm/ioreq.c
> >> @@ -1284,7 +1284,7 @@ struct hvm_ioreq_server *hvm_select_iore
> >>          if ( CF8_ADDR_HI(cf8) &&
> >>               d->arch.cpuid->x86_vendor == X86_VENDOR_AMD &&
> >>               (x86_fam = get_cpu_family(
> >> -                 d->arch.cpuid->basic.raw_fms, NULL, NULL)) > 0x10 &&
> >> +                 d->arch.cpuid->basic.raw_fms, NULL, NULL)) >= 0x10 &&

LGTM

Reviewed-by: Paul Durrant <paul@xxxxxxx>

> >>               x86_fam < 0x17 )
> >>          {
> >>              uint64_t msr_val;
> >>
> >