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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v2 1/2] x86emul: vendor specific SYSCALL behavior
AMD CPUs permit the insn everywhere (even outside of protected mode),
while Intel ones restrict it to 64-bit mode. While at it also comment
about the apparently missing CPUID bit check.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
v2: Replace CPUID bit check by comment.
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5897,13 +5897,16 @@ x86_emulate(
break;
case X86EMUL_OPC(0x0f, 0x05): /* syscall */
- generate_exception_if(!in_protmode(ctxt, ops), EXC_UD);
-
- /* Inject #UD if syscall/sysret are disabled. */
+ /*
+ * Inject #UD if syscall/sysret are disabled. EFER.SCE can't be set
+ * with the respective CPUID bit clear, so no need for an explicit
+ * check of that one.
+ */
fail_if(ops->read_msr == NULL);
if ( (rc = ops->read_msr(MSR_EFER, &msr_val, ctxt)) != X86EMUL_OKAY )
goto done;
generate_exception_if((msr_val & EFER_SCE) == 0, EXC_UD);
+ generate_exception_if(!amd_like(ctxt) && !mode_64bit(), EXC_UD);
if ( (rc = ops->read_msr(MSR_STAR, &msr_val, ctxt)) != X86EMUL_OKAY )
goto done;
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