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Re: [PATCH] x86/amd: Initial support for Fam19h processors


  • To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Thu, 30 Apr 2020 12:41:58 +0200
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  • Cc: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>
  • Delivery-date: Thu, 30 Apr 2020 10:42:15 +0000
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On Thu, Apr 30, 2020 at 11:38:14AM +0100, Andrew Cooper wrote:
> On 30/04/2020 11:35, Roger Pau Monné wrote:
> > On Thu, Apr 30, 2020 at 10:59:47AM +0100, Andrew Cooper wrote:
> >> diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c
> >> index c3f92ed231..014524486f 100644
> >> --- a/xen/arch/x86/nmi.c
> >> +++ b/xen/arch/x86/nmi.c
> >> @@ -398,7 +398,7 @@ void setup_apic_nmi_watchdog(void)
> >>      case X86_VENDOR_AMD:
> >>          switch (boot_cpu_data.x86) {
> >>          case 6:
> >> -        case 0xf ... 0x17:
> >> +        case 0xf ... 0x19:
> >>              setup_k7_watchdog();
> >>              break;
> >>          default:
> >> diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
> >> index 0bcf554e93..33e5d21ece 100644
> >> --- a/xen/arch/x86/traps.c
> >> +++ b/xen/arch/x86/traps.c
> >> @@ -1939,7 +1939,7 @@ static unsigned int calc_ler_msr(void)
> >>          switch ( boot_cpu_data.x86 )
> >>          {
> >>          case 6:
> >> -        case 0xf ... 0x17:
> >> +        case 0xf ... 0x19:
> >>              return MSR_IA32_LASTINTFROMIP;
> > You seem to also add support for Fam18h here and in the chunk above,
> > is this intentional?
> 
> Yes.  Honestly, these details have never changed since the K7.  I'm
> tempted to drop the family logic entirely.

Ack, just wanted to be sure the changes where intentional:

Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

Re dropping the logic - as you wish.

Thanks, Roger.



 


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