Re: [PATCH] x86: retrieve and log CPU frequency information

[Roger Pau Monné <roger.pau@xxxxxxxxxx>]

On Thu, May 14, 2020 at 05:50:29PM +0200, Jan Beulich wrote:
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> On 14.05.2020 17:32, Roger Pau Monné wrote:
> > On Thu, May 14, 2020 at 03:38:18PM +0200, Jan Beulich wrote:
> >> On 14.05.2020 15:10, Roger Pau Monné wrote:
> >>> On Wed, Apr 15, 2020 at 01:55:24PM +0200, Jan Beulich wrote:
> >>>> While from just a single Skylake system it is already clear that we
> >>>> can't base any of our logic on CPUID leaf 15 [1] (leaf 16 is
> >>>> documented to be used for display purposes only anyway), logging this
> >>>> information may still give us some reference in case of problems as well
> >>>> as for future work. Additionally on the AMD side it is unclear whether
> >>>> the deviation between reported and measured frequencies is because of us
> >>>> not doing well, or because of nominal and actual frequencies being quite
> >>>> far apart.
> >>>
> >>> Can you add some reference to the AMD implementation? I've looked at
> >>> the PMs and haven't been able to find a description of some of the
> >>> MSRs, like 0xC0010064.
> >>
> >> Take a look at
> >>
> >> https://developer.amd.com/resources/developer-guides-manuals/
> >>
> >> I'm unconvinced a reference needs adding here.
> > 
> > Do you think it would be sensible to introduce some defines for at
> > least 0xC0010064? (ie: MSR_AMD_PSTATE_DEF_BASE)
> > 
> > I think it would make it easier to find on the manuals.
> 
> I did consider doing so at the time, but dropped the idea as we have
> a few more examples where we use bare MSR numbers when they're used
> just once or very rarely. What I'm not sure about is whether the
> name would help finding the doc - the doc is organized by MSR number
> after all.

I would prefer if we add names as much as possible, as I think it
makes the code easier to understand, but I can also see the point of
that being more churn as you have to end up looking at the manual to
see exactly what each MSR contains anyway.

FTR, I wasn't finding the MSR in the AMD docs because I was searching
as C0010064 when I should be instead using C001_0064.

Thanks, Roger.