RE: [PATCH] x86/Intel: insert Ice Lake and Comet Lake model numbers

[Paul Durrant <xadimgnik@xxxxxxxxx>]

> -----Original Message-----
> From: Jan Beulich <jbeulich@xxxxxxxx>
> Sent: 09 June 2020 11:33
> To: Paul Durrant <paul@xxxxxxx>
> Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>; 
> xen-devel@xxxxxxxxxxxxxxxxxxxx; Roger Pau Monné
> <roger.pau@xxxxxxxxxx>; Wei Liu <wl@xxxxxxx>
> Subject: Re: [PATCH] x86/Intel: insert Ice Lake and Comet Lake model numbers
> 
> On 05.06.2020 19:37, Andrew Cooper wrote:
> > On 05/06/2020 08:51, Jan Beulich wrote:
> >> Both match prior generation processors as far as LBR and C-state MSRs
> >> go (SDM rev 072) as well as applicability of the if_pschange_mc erratum
> >> (recent spec updates).
> >>
> >> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> >> ---
> >> Such changes having been subject to backporting in the past, this
> >> change may want considering for 4.14.
> >> ---
> >> I'm leaving alone spec_ctrl.c, albeit there's a scary looking erratum
> >> for Ice Lake indicating that MDS_NO may wrongly be set. But this is
> >> apparently addressed by ucode update, so we may not need to deal with
> >> it in software.
> >
> > I've enquired about this.  At a guess, there was another hole found, so
> > MDS_NO has been cleared and VERW flushing reinstated.
> >
> > Either way, changes there can wait until we've got confirmation.
> >
> > Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> 
> Paul - any thoughts about this one either way for 4.14?
> 

I don't see any harm in it going in at this stage.

Release-acked-by: Paul Durrant <paul@xxxxxxx>