[Top] [All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 1/2] arm: Add Neoverse N1 processor identifation

To: Bertrand Marquis <bertrand.marquis@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
From: Julien Grall <julien@xxxxxxx>
Date: Tue, 18 Aug 2020 15:07:38 +0100
Cc: nd@xxxxxxx, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Wei Chen <wei.chen@xxxxxxx>, Andre Przywara <andre.przywara@xxxxxxx>
Delivery-date: Tue, 18 Aug 2020 14:07:52 +0000
List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

Hi Bertrand,

Title: s/identifation/identification/

On 18/08/2020 14:47, Bertrand Marquis wrote:

Add MIDR and CPU part numbers for Neoverse N1

Signed-off-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>


I can fix the typo on commit:

Acked-by: Julien Grall <jgrall@xxxxxxxxxx>

Cheers,

--
Julien Grall

Follow-Ups:
- Re: [PATCH 1/2] arm: Add Neoverse N1 processor identifation
  - From: Bertrand Marquis

References:
- [PATCH 0/2] Enable 1165522 Errata for Neovers
  - From: Bertrand Marquis
- [PATCH 1/2] arm: Add Neoverse N1 processor identifation
  - From: Bertrand Marquis

Prev by Date: [PATCH 9/8] x86/msr: Drop compatibility #GP handling in guest_{rd, wr}msr()
Next by Date: Re: [PATCH 1/2] arm: Add Neoverse N1 processor identifation
Previous by thread: [PATCH 1/2] arm: Add Neoverse N1 processor identifation
Next by thread: Re: [PATCH 1/2] arm: Add Neoverse N1 processor identifation
Index(es):
- Date
- Thread

Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.