[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 2/2] xen/arm: Enable CPU Errata 1165522 for Neoverse



Hi Bertrand,

There is only one. So it should be erratum :).

On 18/08/2020 14:47, Bertrand Marquis wrote:
Enable CPU errata of Speculative AT on the Neoverse N1 processor

Ditto.

versions r0p0 to r2p0.
Also Fix Cortex A76 Errata string which had a wrong errata number.

Ditto.

And good catch for the typo :).


Signed-off-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>

All the NITs can be fixed during commit:

Acked-by: Julien Grall <jgrall@xxxxxxxxxx>

Cheers,

---
  xen/arch/arm/cpuerrata.c | 8 +++++++-
  1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c
index 0248893de0..6c09017515 100644
--- a/xen/arch/arm/cpuerrata.c
+++ b/xen/arch/arm/cpuerrata.c
@@ -476,9 +476,15 @@ static const struct arm_cpu_capabilities arm_errata[] = {
          .matches = has_ssbd_mitigation,
      },
  #endif
+    {
+        /* Neoverse r0p0 - r2p0 */
+        .desc = "ARM erratum 1165522",
+        .capability = ARM64_WORKAROUND_AT_SPECULATE,
+        MIDR_RANGE(MIDR_NEOVERSE_N1, 0, 2 << MIDR_VARIANT_SHIFT),
+    },
      {
          /* Cortex-A76 r0p0 - r2p0 */
-        .desc = "ARM erratum 116522",
+        .desc = "ARM erratum 1165522",
          .capability = ARM64_WORKAROUND_AT_SPECULATE,
          MIDR_RANGE(MIDR_CORTEX_A76, 0, 2 << MIDR_VARIANT_SHIFT),
      },


--
Julien Grall



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.