RE: Memory ordering question in the shutdown deferral code

["Durrant, Paul" <pdurrant@xxxxxxxxxxxx>]

> -----Original Message-----
> From: Jan Beulich <jbeulich@xxxxxxxx>
> Sent: 21 September 2020 14:32
> To: Julien Grall <julien@xxxxxxx>
> Cc: Durrant, Paul <pdurrant@xxxxxxxxxxxx>; Stefano Stabellini 
> <sstabellini@xxxxxxxxxx>;
> andrew.cooper3@xxxxxxxxxx; George Dunlap <george.dunlap@xxxxxxxxxx>; Xia, 
> Hongyan
> <hongyxia@xxxxxxxxxx>; xen-devel@xxxxxxxxxxxxxxxxxxxx
> Subject: RE: [EXTERNAL] Memory ordering question in the shutdown deferral code
> 
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> On 21.09.2020 15:27, Julien Grall wrote:
> > I think this part is racy at least on non-x86 platform as x86 seems to
> > implement smp_mb() with a strong memory barrier (mfence).
> 
> The "strength" of the memory barrier doesn't matter here imo. It's
> the fully coherent memory model (for WB type memory) which makes
> this be fine on x86. The barrier still only guarantees ordering,
> not visibility.
> 

In which case I misunderstood what the 'smp' means in this context then.

  Paul